Digital Design Engineer

Intellectual Capital Resources Ltd; Lausanne; Hybrid; CHF 120,000 - 130,000; Full time

Job summary

IC Resources is recruiting a Digital Design Engineer for high-speed communications/ASIC in Lausanne, Switzerland, with UK options available. CHF 120,000–130,000 + benefits and a chance to work on cutting-edge digital and mixed-signal architectures in a small, collaborative R&D team.

You will contribute to RTL development, SerDes interfaces, and design exploration, taking concepts from R&D toward production silicon, with the Lausanne team onsite most days and options for global placements.

Qualifications

• You’ll likely come from an ASIC / Digital IC Design background with strong RTL experience and exposure to at least some of the following.
• High-speed digital design, SerDes, mixed-signal ICs, communications silicon, advanced digital architectures.
• You don’t need to tick every box; problem-solving mindset is valued.
• The team explores new approaches and aims to turn concepts into production silicon.

Responsibilities

• RTL design and microarchitecture.
• High-speed digital design.
• SerDes and high-speed interfaces.
• Mixed-signal digital blocks.
• Digital communications architectures.
• Design exploration and architectural trade-offs.
• Taking new concepts from R&D towards implementation in silicon.

Skills

RTL design

SerDes

High-speed digital

Digital architectures

ASIC / Digital IC design

Mixed-signal ICs

Job description

Digital Design Engineer – High-Speed Communications / ASIC

Lausanne, Switzerland | UK options availableCHF 120,000–130,000 + benefits

What if the architecture wasn’t already decided before you joined?

I’m recruiting Digital Design Engineers for a small advanced semiconductor R&D team exploring new approaches to high-speed communications silicon.

This is not simply a role where you receive a finished specification and spend the next year implementing one RTL block. The team is working on new digital and mixed-signal architectures, with the freedom to question existing approaches, investigate new ideas and help turn the strongest concepts into production silicon.

What you’ll work on

You’ll contribute to the digital architecture and RTL development of advanced communications ICs, working closely with analog, architecture and wider design teams.

The work can include:

• RTL design and microarchitecture
• High-speed digital design
• SerDes and high-speed interfaces
• Mixed-signal digital blocks
• Digital communications architectures
• Design exploration and architectural trade-offs
• Taking new concepts from R&D towards implementation in silicon

The projects have a 2–4 year R&D horizon, so there is genuine room to investigate new approaches rather than simply following an existing standard or product roadmap.

Who they’re looking for

You’ll likely come from an ASIC / Digital IC Design background with strong RTL experience and exposure to at least some of the following:

• High-speed digital design
• SerDes
• Mixed-signal ICs
• Communications silicon
• Advanced digital architectures

You don’t need to tick every box. More important is that you enjoy solving problems where the answer isn’t already written in the specification.

Why it’s interesting

The team is deliberately small and collaborative. You’ll be working closely with experienced engineers, discussing ideas at architecture level, whiteboarding solutions and having considerably more influence over the direction of the design than you might get in a larger organisation. The objective is also very clear: this is exploratory engineering intended to become real silicon, not research that disappears into a presentation deck. The primary R&D team is based in Lausanne, with engineers typically onsite around three days per week. There is also some location flexibility for the digital positions, including opportunities in the UK.

If you’re a Digital Design Engineer who enjoys asking “could we build this differently?”, I’d be very interested in speaking with you