R&D Analog IC Design Engineer — High-Speed, Research-Driven

IC Resources; Lausanne; Vor Ort; CHF 120.000 - 180.000; Vollzeit

Zusammenfassung

IC Resources is seeking an R&D Analog IC Design Engineer to join its Advanced R&D team in Switzerland. The role focuses on researching and developing new analog and mixed-signal circuit concepts for high-speed applications, from architecture through to silicon bring-up.

The ideal candidate has 5+ years in analog or mixed-signal IC design, strong high-speed experience (SerDes/PLLs/ADCs/DACs), and a MSc/ PhD in EE. On-site presence is required at least three days per week in Switzerland.

Qualifikationen

• 5+ years of analog or mixed-signal IC design experience.
• Strong high-speed design experience (SerDes, PLLs, ADCs, DACs).
• Experience with FinFET nodes (16nm/14nm/7nm).
• Proficient in modelling, simulation, and signal integrity.

Aufgaben

• Research and develop new analog and mixed-signal circuit concepts for high-speed applications.
• Explore new architectures to solve circuit and system-level challenges.
• Design and verify high-speed circuits using advanced semiconductor technologies.
• Develop circuit specifications, models and simulation environments.
• Pre-layout and post-layout verification with parasitic extraction.
• Support lab bring-up, silicon debugging and characterization.
• Produce technical analyses and documentation for new concepts.

Kenntnisse

Analog IC Design

Mixed-Signal

High-Speed Design

SerDes

Transceivers

PLL

Cadence Virtuoso

Spectre/HSpice

Ausbildung

MSc or PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

HSpice

Jobbeschreibung

IC Resources is seeking an R&D Analog IC Design Engineer to join its Advanced R&D team in Switzerland. The role focuses on researching and developing new analog and mixed-signal circuit concepts for high-speed applications, from architecture through to silicon bring-up.

The ideal candidate has 5+ years in analog or mixed-signal IC design, strong high-speed experience (SerDes/PLLs/ADCs/DACs), and a MSc/ PhD in EE. On-site presence is required at least three days per week in Switzerland.