High-Speed SerDes Architect & Modelling Engineer

IC Resources

Lausanne

On-site

CHF 110,000 - 160,000

Full time

14 days+

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Job summary

IC Resources in Lausanne, Switzerland, seeks a SerDes Architecture and Modelling Engineer for research-driven role focused on developing models and new transceiver architectures. You will explore high-speed communication concepts, build system-level models, and evaluate signal processing algorithms to enhance link performance.

The role emphasizes research and innovation, with collaboration across architects, IC designers and verification teams.

Qualifications

  • Bachelor's degree or higher in Electrical Engineering, Electronic Engineering, Communications, Computer Science or related field.
  • 5+ years of experience in semiconductor, telecommunications, communications research or scientific software development.
  • Strong background in signal processing, communications, control theory or mathematical modelling.

Responsibilities

  • Research and develop new concepts for high-speed serial communication systems.
  • Build system level models to investigate, compare and optimise new architectures.
  • Develop signal processing algorithms and evaluate their impact on link performance.
  • Use MATLAB, Python or C++ to model communication systems and test new ideas.
  • Work with architects and IC designers to translate research concepts into practical transceiver architectures.
  • Analyse system limitations including signal integrity, noise, power and clock recovery.
  • Define link budgets and block-level specifications based on system requirements.
  • Support analog, digital and verification teams throughout the development process.

Skills

Research
Modelling
Signal processing
MATLAB
Python
C++
System-level modelling
Control theory

Education

Bachelor's degree, EE/related

Tools

SPICE
Spectre

Job description

IC Resources in Lausanne, Switzerland, seeks a SerDes Architecture and Modelling Engineer for research-driven role focused on developing models and new transceiver architectures. You will explore high-speed communication concepts, build system-level models, and evaluate signal processing algorithms to enhance link performance.

The role emphasizes research and innovation, with collaboration across architects, IC designers and verification teams.

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