Senior Design Engineering Manager – Lead Silicon

Microchip Technology Inc.; Toronto, Burnaby, Saskatoon; Híbrido; CAD 107.000 - 226.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Health benefits from day one

Retirement savings plan

IESPP program

Descripción de la vacante

Microchip Technology Inc. seeks a Senior Manager-Design Engineering to lead a large, multi-site team delivering high-performance silicon solutions across networking and edge compute platforms. You will guide architecture, verification and production-readiness while mentoring engineers.

The role requires strong leadership, hands-on design expertise in Verilog/VHDL and SOC experience, with excellent English communication and strategic-cognitive skills for cross-functional growth.

Formación

• Bachelor’s or Master’s degree required in Electrical or Computer Engineering.
• 12+ years of related experience in design leadership or engineering management.
• Experience designing, synthesizing or verifying Verilog or VHDL for silicon, FPGA, or related platforms.

Responsabilidades

• Provide technical leadership for a large, multi-site engineering team delivering integrated silicon solutions.
• Lead and mentor engineers, with emphasis on professional development and performance.
• Coordinate cross-functional work with software, validation and production teams to ensure production-worthy devices.

Conocimientos

Leadership

Coaching/Mentoring

Analytical skills

Verilog/VHDL designs

System-on-a-Chip (SoC) design

English communication

Strategic thinking

Cross-functional collaboration

Debugging skills

Educación

Bachelors or Master’s in Electrical/Computer Engineering

Herramientas

Synopsys tool flows

Cadence tool flows

Descripción del empleo

Microchip Technology Inc. seeks a Senior Manager-Design Engineering to lead a large, multi-site team delivering high-performance silicon solutions across networking and edge compute platforms. You will guide architecture, verification and production-readiness while mentoring engineers.

The role requires strong leadership, hands-on design expertise in Verilog/VHDL and SOC experience, with excellent English communication and strategic-cognitive skills for cross-functional growth.