DSP ASIC Physical Design Engineer

QUALCOMM, Inc.; Markham; On-site; CAD 90,000 - 135,000; Full time

Job summary

Qualcomm Canada ULC in Markham, Ontario seeks a Physical Design Engineer to contribute to DSP cores from RTL to GDSII, focusing on timing closure, power optimization, and silicon realization.

You will collaborate with architecture, RTL, verification, DFT, and methodology teams while learning advanced flows, automation techniques, and industry best practices in a fast-paced semiconductor environment.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 6 months to 2 years of experience in ASIC Physical Design, Digital Design, VLSI, or related semiconductor domain.
• Strong understanding of VLSI and digital design fundamentals, including combinational and sequential logic, FSMs, clocking concepts, and timing analysis.
• Exposure to industry-standard EDA tools used for synthesis, implementation, timing analysis, or verification.
• Basic scripting skills in Python, Tcl, Perl, or Shell.

Responsibilities

• Contribute to ASIC Physical Design activities from netlist to GDSII under the guidance of senior engineers.
• Support floorplanning, placement, clock tree synthesis, routing, timing analysis, and physical verification tasks.
• Analyze and debug timing, congestion, and design rule issues.
• Participate in PPA (Power, Performance, Area) analysis and optimization activities.
• Assist with ECO implementation, design closure, and tapeout readiness.
• Collaborate with RTL, DFT, verification, and methodology teams to resolve design and implementation challenges.
• Develop scripts and automation solutions to improve engineering productivity and design quality.
• Learn and apply industry best practices for advanced semiconductor design and implementation.

Skills

VLSI fundamentals

Digital design fundamentals

Timing analysis

Scripting (Python/Tcl/Perl/Shell)

Communication & teamwork

Education

Bachelor's or Master's degree in Electrical Engineering or Computer Engineering

Tools

Synthesis tools

Placement & Routing tools

EDA tools

Job description

Qualcomm Canada ULC in Markham, Ontario seeks a Physical Design Engineer to contribute to DSP cores from RTL to GDSII, focusing on timing closure, power optimization, and silicon realization.

You will collaborate with architecture, RTL, verification, DFT, and methodology teams while learning advanced flows, automation techniques, and industry best practices in a fast-paced semiconductor environment.