Tech-Aware Logic Synthesis for Next-Gen Transistors (Intern)

Imec; Vlaams-Brabant; Remote; EUR 3,300 - 5,600; Part time

Benefits offered by this job

Allowance for non-Belgian students

Job summary

Imec invites Master students in Computer Science or Electrical Engineering to join a 6-9 month internship focused on making logic synthesis aware of emerging transistor technologies. You will develop physically grounded cost models and apply them inside technology mapping and optimisation workflows using open synthesis tools.

An evaluation on benchmark designs will demonstrate potential gains over conventional flows.

Qualifications

• Must be enrolled in a Master program.
• Background in computer science or electrical engineering preferred.
• Strong analytical and problem-solving skills.

Responsibilities

• Develop technology-aware cost models for logic at transistor and cell levels.
• Integrate models into logic synthesis flows and evaluate with benchmark designs to quantify gains.

Education

Master student in Computer Science or Electrotechnics/Electrical Engineering

Job description

Imec invites Master students in Computer Science or Electrical Engineering to join a 6-9 month internship focused on making logic synthesis aware of emerging transistor technologies. You will develop physically grounded cost models and apply them inside technology mapping and optimisation workflows using open synthesis tools.

An evaluation on benchmark designs will demonstrate potential gains over conventional flows.