Automated Validation for Emerging Transistor Architectures

Imec; Vlaams-Brabant; On-site; EUR 10,000 - 13,000; Full time

Benefits offered by this job

Imec internship allowance

Job summary

Imec in Belgium is offering a Master internship focused on automated electrical characterization for emerging transistor architectures. You will work on automating the physical realization of digital building blocks using open process design kits, open layout tools, and verification/extraction chains to compare results with models.

The project covers layout-driven generation, verification, parasitic extraction, and characterization in industry-standard formats, with supervision by Siva Satyendra

Qualifications

• Master internship

Responsibilities

• Automate the physical realization of digital building blocks on open process design kits with open layout, verification and simulation tools.
• Handle layout generation driven by the circuit structure, the verification and extraction chain, and characterization to compare with predictive models.

Education

Computer Science

Electrotechnics/Electrical Engineering

Job description

Imec in Belgium is offering a Master internship focused on automated electrical characterization for emerging transistor architectures. You will work on automating the physical realization of digital building blocks using open process design kits, open layout tools, and verification/extraction chains to compare results with models.

The project covers layout-driven generation, verification, parasitic extraction, and characterization in industry-standard formats, with supervision by Siva Satyendra