Application-Driven Memory xTCO

Imec; Vlaams-Brabant; On-site; EUR 11,000 - 18,000; Full time

Benefits offered by this job

Allowance provided

Job summary

imec seeks a motivated student for a PhD/Master internship on memory technologies and hardware-software co-design. You will explore memory technologies, build system-technology co-optimization studies, and map applications to data movement costs.

You will work with Ramulator, DRAMsys and gem5 in a collaborative, interdisciplinary environment at imec. The role offers a hands-on path to cutting-edge memory research, with supervision by KU Leuven and imec researchers, and a competitive internship

Qualifications

• Electromechanical engineering background
• Computer Science background
• Electrotechnics / Electrical Engineering background
• Analytical and detail‑oriented with strong interest in technology and hardware‑software codesign.
• Experience or interest in technology modelling, performance and energy analysis tools.
• Interest in cutting-edge memory research.

Responsibilities

• Guided research of current and emerging memory technologies as well as interfacing in-house experts.
• Employing STCO methodology by way of using and connecting mixed‑fidelity modelling and simulation tools. This can include analytical models, cycle‑aware/-approximate simulation (with tools such as Ramulator, DRAMsys, orgem5), and/or cycle accurate simulation.
• Profiling and mapping applications with full‑and sub‑system awarenessfor technology propositions to quantify costs and trade‑offs of data movement.
• Developingruntime optimisation strategies (e.g., adaptive tiling/scheduling andprefetching) to dynamically balance latency, bandwidth, and energy underchanging workload phases.

Education

Electromechanical engineering

Computer Science

Electrotechnics/Electrical Engineering

Tools

Ramulator

DRAMsys

gem5

Job description

Currentmemory systems and hierarchies are struggling to keep pace with modern workloaddemands, especially those imposed by generative AI models. On-chip, SRAMscaling has stagnated due to physical scaling limits in advanced fabricationnodes. Meanwhile, off-chip, DRAM scaling is slowing due to challenges in layoutand connectivity. As a result, novel memory technologies must be consideredwholistically, both in terms of the technology proposition and theapplication-driven use case.

imec worksto identify and evaluate novel memory technologies, organizations,integrations, and packaging, including but not limited to string memories suchas charge-coupled device memories (CCD), flash memories, embedded DRAM, ferro-backedmemory, and others. On the Technology-Application Co-Optimization for Systems(TACOS) team, we specialize in end-to-end exploration of these memories andalternatives, i.e. from technology to application mapping, by usingsystem-technology co-optimization (STCO) methodologies.

Thisinternship proposes the exploration of such memories from a co-design point ofview, including both top-down (establishing technology requirements) andbottom‑up (establishing application paradigm shifts) approaches. During thisinternship the candidate will be responsible for,

• Guided research of current and emerging memory technologies as well asinterfacing in-house experts.
• Employing STCO methodology by way of using and connecting mixed‑fidelitymodelling and simulation tools. This can include analytical models,cycle‑aware/-approximate simulation (with tools such as Ramulator, DRAMsys, orgem5), and/or cycle accurate simulation.
• Profiling and mapping applications with full‑and sub‑system awarenessfor technology propositions to quantify costs and trade‑offs of data movement.
• Developingruntime optimisation strategies (e.g., adaptive tiling/scheduling andprefetching) to dynamically balance latency, bandwidth, and energy underchanging workload phases.

This role is ideal for someone who is deeplyinterested in hardware‑software‑technology codesign, memory architecture, andworking in an interdisciplinary environment that values innovation, creativity,and real‑world impact.

Profile: You are analytical and detail-oriented,with a strong interest in technology, subsystem-level modelling andhardware‑software codesign. You are adept at or have a keen interest in technologymodelling, performance and energy analysis tools, and cutting‑edge memoryresearch.

Type of internship: PhD internship, Master internship

Duration: 6‑12 months

Required educational background: Electromechanical engineering, Computer Science, Electrotechnics/Electrical Engineering

University promotor: Chris Van Hoof (KU Leuven)

Supervising scientist(s): For further information or for application, please contact Joshua Klein ( [e-mail] )

The reference code for this position is 2026‑INT‑297. Mention this reference code in your application.

Imec allowance will be provided.

Applications should include the following information:

• resume
• motivation
• current study

imec's cleanroom