Automated electrical characterization for emerging transistor architectures

Imec; Vlaams-Brabant; On-site; EUR 10,000 - 13,000; Full time

Benefits offered by this job

Imec internship allowance

Job summary

Imec in Belgium is offering a Master internship focused on automated electrical characterization for emerging transistor architectures. You will work on automating the physical realization of digital building blocks using open process design kits, open layout tools, and verification/extraction chains to compare results with models.

The project covers layout-driven generation, verification, parasitic extraction, and characterization in industry-standard formats, with supervision by Siva Satyendra

Qualifications

• Master internship

Responsibilities

• Automate the physical realization of digital building blocks on open process design kits with open layout, verification and simulation tools.
• Handle layout generation driven by the circuit structure, the verification and extraction chain, and characterization to compare with predictive models.

Education

Computer Science

Electrotechnics/Electrical Engineering

Job description

Automated electrical characterization for emerging transistor architectures

let's close the gap between a circuit on paper and a circuit using advanced silicon technologies.

A circuit idea is only as real as its layout. Between acircuit description and a verified, characterized building block lie placement,routing, design-rule and layout-versus-schematic checks, parasitic extractionand characterization, steps that are still largely manual for anything new andthat differ from one transistor architecture to the next. This is where mostpromising ideas stall, and where the models that proposed them meet their firstreal test.

The student will work on automating the physical realizationof digital building blocks on open process design kits with open layout,verification and simulation tools: layout generation driven by the circuit'sstructure, the verification and extraction chain, characterization toindustry-standard formats, and a systematic comparison of the realized resultwith the models that predicted it, so that the models can be corrected wherethey miss.

Type of internship: Master internship

Duration: 6-9 months

Required educational background: Computer Science, Electrotechnics/Electrical Engineering

Supervising scientist(s): For further information or for application, please contact Siva Satyendra Sahoo ( [e-mail] )

The reference code for this position is 2026-INT-358.

Imec allowance will be provided for students studying at a non-Belgian university.

imec's cleanroom