Senior DRAM Periphery Architect & Circuit Designer

imec; Vlaams-Brabant; Presencial; EUR 90.000 - 120.000; Tempo integral

Resumo da vaga

Imec seeks a senior engineer to lead DRAM periphery design and analysis. You will drive circuit exploration that enables robust, high‑performance DRAM solutions, coordinating across transistor‑level design, array organization, and macro architecture.

You will contribute to silicon bring‑up, tapeouts and test‑chip activities, while collaborating with device, process, and DTCO teams to translate memory concepts into practical circuit implementations.

Qualificações

• Master's or PhD in Electrical Engineering, Electronics or related field.
• At least 6 years in DRAM industry focused on periphery circuit design.
• Deep understanding of DRAM array organization and interaction with periphery and protocol.
• Hands-on experience designing and analyzing DRAM peripheral circuits.

Responsabilidades

• Design, analyze and optimize DRAM peripheral blocks such as row/column path circuitry and sense-amplifier related functions.
• Bridge transistor-level design to macro architecture and participate in tapeout readiness.
• Understand DRAM access flow and protocol timing implications across design stages.
• Collaborate with circuit designers, device experts and process integration teams.

Conhecimentos

DRAM design

Periphery circuit design

Layout-aware design

Cross-functional collaboration

Hardware debugging

Formação

Master's or PhD in Electrical Engineering or Electronics

Ferramentas

Virtuoso IC design

Hspice

Calibre DRC/LVS

Descrição da vaga

Imec seeks a senior engineer to lead DRAM periphery design and analysis. You will drive circuit exploration that enables robust, high‑performance DRAM solutions, coordinating across transistor‑level design, array organization, and macro architecture.

You will contribute to silicon bring‑up, tapeouts and test‑chip activities, while collaborating with device, process, and DTCO teams to translate memory concepts into practical circuit implementations.