EUV Lithography Process Engineer — High-NA & Memory/Logic

Jefferson Wells Belgium

Vlaams-Brabant

On-site

EUR 70,000 - 110,000

Full time

9 hours ago
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Job summary

Jefferson Wells Belgium is seeking a highly skilled researcher to develop and optimize patterning processes using EUV and High-NA EUV lithography for memory and logic applications.

The role focuses on designing and executing experiments, delivering lithography processes, and collaborating with multidisciplinary teams to advance semiconductor technologies at a cutting-edge R&D environment.

Qualifications

  • Master’s degree in Chemistry, Physics, or Electronics.
  • Initial relevant experience in microelectronics processes and process improvement.
  • Cleanroom experience is mandatory.
  • Good understanding of semiconductor manufacturing processes and patterning.
  • Knowledge of advanced lithography technologies, ideally including 193 nm immersion lithography and/or EUV / High-NA EUV.
  • Strong experimental and analytical skills, including experimental design, data analysis, technical troubleshooting, and process optimization.
  • Ability to work effectively within multidisciplinary R&D teams (lithography, process integration, etch, metrology, etc.).
  • Strong communication, reporting, and organizational skills.
  • Fluency in English is mandatory.

Responsibilities

  • Design, execute, and analyze experiments related to patterning process development.
  • Develop and deliver lithography processes that meet internal and customer requirements.
  • Collaborate with cross-functional teams to integrate new processes and metrology techniques, from wafer processing through to electrical testing.
  • Monitor progress, document results, and communicate outcomes to project leaders, program managers, and customers.

Skills

Patterning
Lithography
Data analysis
Cleanroom
Multidisciplinary teamwork
English fluency

Education

Master’s degree in Chemistry/Physics/Electronics

Job description

Jefferson Wells Belgium is seeking a highly skilled researcher to develop and optimize patterning processes using EUV and High-NA EUV lithography for memory and logic applications.

The role focuses on designing and executing experiments, delivering lithography processes, and collaborating with multidisciplinary teams to advance semiconductor technologies at a cutting-edge R&D environment.

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