Chiplet Test Protocols Engineer – FPP & 3D-IC

Imec; Vlaams-Brabant; Hybrid; EUR 8,900 - 13,000; Full time

Benefits offered by this job

Allowance provided

Job summary

imec is seeking a student in Computer Science, Informatics, or Electrical Engineering for a Master internship (9–12 months) in Belgium. The project focuses on designing and implementing a new test protocol description language to support diverse test-access mechanisms for embedded cores and chiplets, enabling compatibility with FPP interfaces.

The selected candidate should have strong programming skills (C++ or Python), knowledge of Verilog or VHDL, and be proficient in English in an

Qualifications

• Proficiency in at least one programming language (C++ or Python).
• Familiarity with hardware description languages (Verilog or VHDL).
• Interest in design-for-test (DfT) for digital ICs desirable.

Responsibilities

• Assist design and implementation of a test protocol language for chiplets and SoC test integration.
• Support development work for FPP and other test-access mechanisms.
• Contribute to documentation and testing activities for the language description toolchain.

Skills

C++

Python

Verilog

VHDL

Education

Computer Science

Electrical Engineering

Job description

imec is seeking a student in Computer Science, Informatics, or Electrical Engineering for a Master internship (9–12 months) in Belgium. The project focuses on designing and implementing a new test protocol description language to support diverse test-access mechanisms for embedded cores and chiplets, enabling compatibility with FPP interfaces.

The selected candidate should have strong programming skills (C++ or Python), knowledge of Verilog or VHDL, and be proficient in English in an