Digital Design Engineer

Vivid Resourcing Ltd; Vlaams-Brabant; On-site; EUR 65,000 - 90,000; Full time

Job summary

Vivid Resourcing Ltd in Belgium is seeking a Digital Design Engineer to join a seasoned hardware team. You will contribute to the digital ASIC lifecycle from architecture and RTL design through verification, synthesis and implementation.

You will collaborate with digital, analogue, verification and systems engineers to deliver robust, high‑performance ASIC solutions and own complex design blocks, shaping next‑generation semiconductor products.

Qualifications

• Degree in Electrical/Electronics/Computer Engineering or related field.
• Professional experience in digital ASIC design with RTL focus.
• Strong knowledge of Verilog and SystemVerilog.
• Experience with ASIC development flows including simulation, synthesis and timing analysis.

Responsibilities

• Design and develop digital ASICs from specification to implementation.
• Develop synthesizable RTL using Verilog or SystemVerilog.
• Translate requirements into efficient digital designs.
• Collaborate with verification engineers for robust validation.
• Support simulation, debugging, synthesis and timing analysis.
• Contribute to design reviews and technical decisions across the ASIC process.
• Analyze and resolve RTL and gate-level design issues.
• Collaborate with analogue, mixed-signal, FPGA and systems teams when required.
• Improve design methodologies, coding standards and development processes.

Skills

RTL development

Verilog/SystemVerilog

ASIC design

Digital design

Synchronous design

EDA tools

Education

Electrical/Electronics/Computer Engineering degree

Tools

Verilog tooling

Timing analysis tools

Simulation tools

Job description

We're current recruiting for a Digital Design Engineer to join an experienced hardware development team.

In this role, you will be involved throughout the digital ASIC development lifecycle, from architecture and RTL design through to verification, synthesis and implementation.

You will work closely with other digital, analogue, verification and systems engineers to develop robust, high-performance ASIC solutions.

The position offers the opportunity to take ownership of complex digital design blocks while contributing to the development of next-generation semiconductor products.

Key Responsibilities:

• Design and develop digital ASICs from specification and architecture through to implementation.
• Develop high-quality, synthesizable RTL using Verilog or SystemVerilog.
• Translate functional and architectural requirements into efficient digital designs.
• Work closely with verification engineers to ensure robust design validation.
• Support simulation, debugging, synthesis and timing analysis.
• Contribute to design reviews and technical decisions across the ASIC development process.
• Analyse and resolve design issues at RTL and gate level.
• Collaborate with analogue, mixed-signal, FPGA and systems teams where required.
• Contribute to improving design methodologies, coding standards and development processes.

Your Profile:

• Degree in Electrical Engineering, Electronics Engineering, Computer Engineering or a related field.
• Professional experience in digital ASIC design, with a strong focus on RTL development.
• Strong knowledge of Verilog and/or SystemVerilog.
• Good understanding of digital design principles, RTL coding and synchronous design.
• Experience with ASIC development flows, including simulation, synthesis and timing analysis.
• Familiarity with RTL verification and common simulation/EDA tools.
• Ability to work from technical specifications and contribute to architectural discussions.
• Strong analytical and problem-solving skills.
• Experience working in multidisciplinary hardware development teams.

The Offer:

• A salary & benefits package commensurate with experience