Lead ASIC Physical Design & Sign-off Engineer

Engibex; Vlaams-Brabant; On-site; EUR 60,000 - 90,000; Full time

Job summary

Engibex is seeking an IC/SoC design consultant in Belgium to drive the Cadence Innovus Place & Route flow and lead timing budget partitioning for sub-blocks. You will work directly with the Physical Design team to achieve tape-out sign-off and communicate technical specifications to customers.

The role emphasizes setting up flows for chosen libraries, implementing low-power UPF strategies, and ensuring robust timing and physical verification.

Qualifications

• Experience setting up flow for library sets and foundry node.
• Experience in low power design (UPF) and debug SDC.
• Knowledge in floorplanning and power grid design for top level and blocks.
• Place, CTS and routing skills.
• Solve setup and hold violations and sign-off extraction/timing.
• Experience in physical verification and logic equivalence checks.

Responsibilities

• Direct contact with customers for future projects.
• Lead partitioning and split top-level SDC into timing budgets.
• Collaborate with Physical Design to drive signoff closure for tape-out.
• Communicate customer specifications as a technical voice.

Skills

Cadence Innovus

Floorplanning

Place & Route

Power integrity

Timing analysis

Sign-off experience

SPEF/QUANTUS timing

Tools

Tempus

Voltus

SPEF/QUANTUS

DRC/ERC/LVS

Job description

Engibex is seeking an IC/SoC design consultant in Belgium to drive the Cadence Innovus Place & Route flow and lead timing budget partitioning for sub-blocks. You will work directly with the Physical Design team to achieve tape-out sign-off and communicate technical specifications to customers.

The role emphasizes setting up flows for chosen libraries, implementing low-power UPF strategies, and ensuring robust timing and physical verification.