Senior Digital ASIC Design Engineer

Vivid Resourcing Ltd; Vlaams-Brabant; On-site; EUR 65,000 - 90,000; Full time

Job summary

Vivid Resourcing Ltd in Belgium is seeking a Digital Design Engineer to join a seasoned hardware team. You will contribute to the digital ASIC lifecycle from architecture and RTL design through verification, synthesis and implementation.

You will collaborate with digital, analogue, verification and systems engineers to deliver robust, high‑performance ASIC solutions and own complex design blocks, shaping next‑generation semiconductor products.

Qualifications

• Degree in Electrical/Electronics/Computer Engineering or related field.
• Professional experience in digital ASIC design with RTL focus.
• Strong knowledge of Verilog and SystemVerilog.
• Experience with ASIC development flows including simulation, synthesis and timing analysis.

Responsibilities

• Design and develop digital ASICs from specification to implementation.
• Develop synthesizable RTL using Verilog or SystemVerilog.
• Translate requirements into efficient digital designs.
• Collaborate with verification engineers for robust validation.
• Support simulation, debugging, synthesis and timing analysis.
• Contribute to design reviews and technical decisions across the ASIC process.
• Analyze and resolve RTL and gate-level design issues.
• Collaborate with analogue, mixed-signal, FPGA and systems teams when required.
• Improve design methodologies, coding standards and development processes.

Skills

RTL development

Verilog/SystemVerilog

ASIC design

Digital design

Synchronous design

EDA tools

Education

Electrical/Electronics/Computer Engineering degree

Tools

Verilog tooling

Timing analysis tools

Simulation tools

Job description

Vivid Resourcing Ltd in Belgium is seeking a Digital Design Engineer to join a seasoned hardware team. You will contribute to the digital ASIC lifecycle from architecture and RTL design through verification, synthesis and implementation.

You will collaborate with digital, analogue, verification and systems engineers to deliver robust, high‑performance ASIC solutions and own complex design blocks, shaping next‑generation semiconductor products.