FPGA Validation Design Engineer – Contract

microTECH Global Limited; Vlaams-Brabant; Hybrid; EUR 65,000 - 90,000; Full time

Job summary

microTECH Global LTD is seeking an FPGA Validation Design Engineer for an initial 3‑month contract in Leuven, Belgium, with a hybrid work arrangement (3 days onsite, 2 days remote). Start date ASAP.

You will work on semiconductor verification, including FPGA integration and validation within a hands‑on project team. Candidates should have 5+ years of experience in semiconductors and be fluent in English; required skills include SystemVerilog, UVM, FPGA synthesis/place‑and‑route, timing closure,

Qualifications

• 5+ years of relevant semiconductor experience.
• Fluent English.

Responsibilities

• Hands-on FPGA implementation, validation and design verification across the project.

Skills

FPGA verification

SystemVerilog

UVM

CPU/Device verification

FPGA synthesis/place‑and‑route

Board‑level debugging

ASIC RTL modification

Job description

I am currently hiring for an FPGA Validation Design Engineer for an initial 3-month contract in Leuven, Belgium, offering hybrid working.

If you have relevant FPGA and semiconductor verification experience.

FPGA Validation Design Engineer – Contract

Location: Leuven, Belgium
Duration: Initial 3 months
Start Date: ASAP

Working Arrangement: Hybrid (3 days onsite, 2 days remote)

I'm currently recruiting an experienced FPGA Validation Design Engineer to join an exciting semiconductor project in Leuven.

Key Requirements:

• 5+ years of relevant semiconductor experience.
• ASIC RTL modification and FPGA integration.
• FPGA synthesis, place-and-route and timing closure.
• FPGA validation and board-level debugging.
• Experience with SystemVerilog, UVM and CPU/device verification.
• Fluent English.

This is a hands-on opportunity to work across FPGA implementation, validation and design verification, with some flexibility in working arrangements after induction.