Latency-Driven FPGA Developer Intern

SANITI - Student Association of Nelson-Marlborough Institute of Technology Inc; Sydney; Hybrid; AUD 33,000 - 42,000; Full time

Benefits offered by this job

Remuneration package

Flights & accommodation

Training & mentorship

Gym membership & weekly chair massages

Daily breakfast, lunch & in-house bar

Job summary

Optiver is offering a FPGA Developer Intern program in Sydney, Australia. You’ll work with senior hardware engineers to build latency-optimised, nanosecond-timed trading systems as part of a fast-feedback internship, with a chance to receive a full-time graduate offer.

Over 10 weeks you’ll be paired with an experienced FPGA developer, work on latency-critical applications, and participate in world-class training and trader exposure to real-time market activity.

Qualifications

• Penultimate or pre-penultimate university student in Electrical/Computer Engineering.
• Experience with HDL languages and some Python/C++.
• Familiar with Ethernet/IP/TCP/UDP networks.
• Interest in low-latency, high-performance FPGA designs.

Responsibilities

• Design latency-critical systems that respond to real-time markets.
• Accelerate network infrastructure and trading systems with advanced devices and techniques.
• Develop rigorous test benches using VHDL and SystemVerilog.
• Explore faster data communication/processing mechanisms for performance gains.

Skills

VHDL

Verilog

Python

C++

FPGA development

Education

Electrical/Computer Engineering (student)

Tools

HDL simulators

Vivado

Git

Job description

Optiver is offering a FPGA Developer Intern program in Sydney, Australia. You’ll work with senior hardware engineers to build latency-optimised, nanosecond-timed trading systems as part of a fast-feedback internship, with a chance to receive a full-time graduate offer.

Over 10 weeks you’ll be paired with an experienced FPGA developer, work on latency-critical applications, and participate in world-class training and trader exposure to real-time market activity.