FPGA Developer Intern: Build Latency-Critical Trading Tech

Centro Escolar University; Sydney; Hybrid; AUD 34,000 - 48,000; Full time

Benefits offered by this job

Competitive pay

Flights & accommodation

Mentorship

Training & development

Gym membership

Meals provided

Social events

Job summary

Optiver is offering a 10-week FPGA Developer Intern position in Sydney. You’ll work with experienced hardware engineers to build latency-sensitive trading systems and learn with our world-class training program.

You’ll be paired with a seasoned FPGA developer, design real-time systems, test benches in VHDL/SystemVerilog, and gain exposure to cutting-edge networking and data processing. Successful interns may receive a full-time graduate offer.

Qualifications

• Penultimate university student in Electrical or Computer Engineering.
• Australian/New Zealand citizen or right to work in Australia.
• Studying an Electrical Engineering, Computer Engineering, or similarly technical degree.
• Deeply passionate about technology, particularly FPGA development.
• Knowledgeable about HDL languages: VHDL and/or Verilog and some Python/C++.
• Understand network protocols: Ethernet, IP, TCP/UDP.
• Familiar with FPGA logic elements, transceivers, memory and other on-chip resources.
• Experience developing algorithms in software.
• Excited to create high-performance, low-latency designs that impact trading success.

Responsibilities

• Develop latency-critical applications for trading systems.
• Work with FPGA developers to expose real-time hardware capabilities.
• Design accurate and efficient systems that respond to markets in real time.
• Accelerate network infrastructure and trading systems with modern tools and techniques.

Skills

HDL languages

Networking basics

Low-latency design

C++ programming

Python programming

Education

Electrical/Computer Engineering (penultimate year)

Tools

VHDL

Verilog

Ethernet/IP/TCP/UDP

Job description

Optiver is offering a 10-week FPGA Developer Intern position in Sydney. You’ll work with experienced hardware engineers to build latency-sensitive trading systems and learn with our world-class training program.

You’ll be paired with a seasoned FPGA developer, design real-time systems, test benches in VHDL/SystemVerilog, and gain exposure to cutting-edge networking and data processing. Successful interns may receive a full-time graduate offer.