FPGA Developer Intern: Build Ultra-Low Latency Trading

Cognitioworld; Sydney; Hybrid; AUD 40,000 - 60,000; Full time

Benefits offered by this job

Flights & accommodation provided

Training & mentorship

Gym membership

In-house meals: breakfast & lunch

Job summary

Optiver in Sydney invites an FPGA Developer Intern to work with our hardware engineers on latency-critical systems powering real-time trading. You’ll contribute to fast, reliable trading tech and learn through a world-class, mentor-led training program.

Expect hands-on exposure to VHDL, Verilog, Python and C++, along with modern HDL test benches and high-performance networking techniques. A strong focus on learning and impact drives our summer program.

Qualifications

• Studying Electrical Engineering, Computer Engineering or a similarly technical degree.
• Experience with HDL languages (VHDL/Verilog) and some software programming (Python/C++).
• Interest in high-performance, low-latency FPGA design.

Responsibilities

• Contribute to latency-critical FPGA designs used in real-time trading.
• Develop and test FPGA modules using VHDL/Verilog/SystemVerilog.
• Collaborate with traders and hardware engineers to optimize performance.

Skills

VHDL

Verilog

SystemVerilog

Python

C++

Networking

Education

Electrical Engineering or Computer Engineering

Job description

Optiver in Sydney invites an FPGA Developer Intern to work with our hardware engineers on latency-critical systems powering real-time trading. You’ll contribute to fast, reliable trading tech and learn through a world-class, mentor-led training program.

Expect hands-on exposure to VHDL, Verilog, Python and C++, along with modern HDL test benches and high-performance networking techniques. A strong focus on learning and impact drives our summer program.