Senior Staff Engineer Analog Mixed-Signal Design (f/m/div)

Infineon Technologies AG; Villach; Vor Ort; EUR 90.000 - 130.000; Vollzeit

Zusammenfassung

Infineon Technologies AG in Austria is seeking a Senior Engineer in Analog Mixed-Signal Design to shape the future of technology. You will lead end-to-end ADC design, define architectures, implement circuits, and drive silicon bring-up in collaboration with cross-functional teams.

The position requires 5+ years of hands-on analog/mixed-signal IC design, strong ADC expertise, and proficiency with Cadence tools.

Qualifikationen

• M.Sc. or Ph.D. in Electrical Engineering, Microelectronics, or related field.
• 5+ years of hands-on analog/mixed-signal IC design with silicon bring-up.
• Expertise in ADC architectures (SAR, Pipeline, Sigma-Delta, Flash, or hybrid).
• Solid understanding of mixed-signal design including clocking and calibration.
• Proficiency with Cadence Virtuoso/Spectre, ADE XL, HSPICE and advanced CMOS nodes (130nm–12nm).
• Python and/or MATLAB for automation and system-level modeling.

Aufgaben

• Lead end-to-end ADC design from architecture definition to silicon bring-up.
• Design analog/mixed-signal building blocks (OTAs, comparators, DACs, references, clocking).
• Drive pre-silicon simulations, Monte Carlo, corner, and worst-case analyses; post-silicon characterization.
• Develop behavioral/architectural models in Python or MATLAB for system-level exploration.
• Collaborate with digital, physical design and CAD teams to ensure successful tape-out.
• Mentor junior engineers, lead design reviews, and introduce innovative approaches.

Kenntnisse

Analog IC design

ADC design

Python/MATLAB

EDA tools

CMOS processes

Ausbildung

M.Sc./Ph.D. in Electrical Engineering

Tools

Cadence Virtuoso/Spectre

ADE XL

HSPICE

Jobbeschreibung

#WeAreIn for jobs that impact everyone's life. Join the thinkers, builders, and problem solvers behind tomorrow’s technology. As a Senior Engineer Analog Mixed-Signal Design on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?

Key Responsibilities

• Lead end-to-end ADC design – architecture definition, circuit implementation, and silicon bring-up of high-performance converters (SAR, Pipeline, Sigma-Delta, Flash, or hybrid topologies)
• Design critical analog/mixed-signal building blocks including OTAs, comparators, DACs, sample-and-hold circuits, references, and clocking/bias circuits with clear ownership of performance, power, area, and cost trade-offs
• Drive comprehensive pre-silicon – transistor-level to chip-level simulations, Monte Carlo, corner, and worst-case analyses – through to post-silicon lab characterization and debug
• Develop behavioral and architectural models of ADC and mixed-signal blocks using Python and/or MATLAB for system-level simulation and early design exploration
• Collaborate cross-functionally with digital design, physical design, and CAD teams to ensure successful tape-out, and interface with customers and product teams to align technical solutions with requirements
• Mentor junior and mid-level engineers, lead design reviews, and actively contribute innovative ideas based on state-of-the-art trends in mixed-signal and ADC design

Qualifications and Skills

• An M.Sc. or Ph.D. in Electrical Engineering, Microelectronics, or a related field
• 5+ years of hands‑on industry experience in analog and mixed‑signal IC design, with a proven track record of successful silicon tape‑outs and product bring‑up
• Deep expertise in one or more ADC architectures (SAR, Pipeline, Sigma-Delta, Flash, or hybrid topologies) and analog building blocks such as OTAs, comparators, references, LDOs, and switched‑capacitor circuits
• Solid understanding of mixed-signal design including clock distribution, digital calibration, timing closure, and asynchronous logic
• Proficiency with EDA tools (Cadence Virtuoso/Spectre, ADE XL, HSPICE, or equivalent), the full custom IC design flow, and experience with advanced CMOS process nodes (e.g., 130nm–12nm)
• Skills in Python and/or MATLAB/Simulink for automation, scripting, and system-level modeling, as well as knowledge of digital calibration techniques

Salary and Benefits

• Austria: We offer competitive salaries and additional benefits based on your performance, experience, and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group H (https://www.feei.at/aktuelles/mindestloehne-und-gehaelter-eei/). The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills.
• Padova, Italy: € 43.440 – € 59.730 (The stated salary comprises annual base pay and target variable compensation. The starting salary is determined using objective, gender neutral criteria, including relevant experience, qualifications, and role scope; prior compensation is not requested or considered. Employees also benefit from a comprehensive total rewards package, which may include further compensation and benefit elements depending on local regulations and company policies.)

About Infineon

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game‑changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. We are on a journey to create the best Infineon for everyone.

We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon.

Maria Pollai-Schlintl https://www.linkedin.com/in/maria-pollai-schlintl-5189b099/