Senior Staff Engineer Verification (f/m/div)

Infineon Technologies AG; Villach; Vor Ort; EUR 90.000 - 120.000; Vollzeit

Zusammenfassung

Infineon Technologies AG is seeking a Senior Staff Engineer in Verification to shape the future of digital verification for mixed-signal designs. You will define verification plans, build advanced environments with SystemVerilog, UVM, and constrained random techniques, and drive tests across RTL and gate-level implementations.

You will lead a team of verification engineers, collaborate with analog and digital designers, and mentor juniors, while pushing continuous improvements in methodologies

Qualifikationen

• University degree in Electrical Engineering, Computer Science, Information Technology or similar.
• 6+ years of Digital Verification experience, leadership helpful.
• Strong SystemVerilog, UVM, and verification tool know-how (Xcelium, Verdi, vManager).
• Good RTL design knowledge and digital or mixed-signal circuits.
• GIT, Python, and other programming languages are a plus.

Aufgaben

• Create and define verification plans for digital verification of mixed-signal designs.
• Develop and improve verification environments using SystemVerilog, UVM, and constrained-random techniques.
• Execute tests on RTL and gate-level; debug design and verification issues.
• Lead and coordinate other verification engineers in projects.
• Collaborate with analog and digital designers and other verification engineers.
• Mentor junior colleagues, consultants and students.
• Drive innovation projects to enhance existing methodologies and flows.

Kenntnisse

SystemVerilog

UVM

Xcelium

Verdi

vManager

RTL design

GIT

Python

Ausbildung

Bachelor's degree in Electrical Engineering/Computer Science or similar

Tools

Xcelium

Verdi

vManager

Jobbeschreibung

#WeAreIn for jobs that impact everyone's life. Join the thinkers, builders, and problem-solvers behind tomorrow’s technology.

As a Senior Staff Engineer Verification (f/m/div) in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?

Your Role

Key responsibilities in your new role

• Create and define verification plans, for digital verification of Mixed Signal designs
• Create new and improve existing verification environments in SystemVerilog language using Universal VerificationMethodology (UVM) and Constrained Random approach
• Execute tests in these environments on RTL and gate-level and debug issues in design and verification environments
• Lead and coordinate other verification engineers in projects
• Closely cooperate with analog and digitaldesigners as well as concept and other verification engineers
• Mentoring of junior colleagues, consultants and students
• Contribute to enhancement of existing methodologies and flows, by driving required innovation projects

Your Profile

Qualifications and skills to help you succeed

• A university degree in Electrical Engineering, Computer Science, Information Technology or a similar academic discipline
• 6+ years of experience in Digital Verification. Experience with leadership responsibilities as a plus
• Excellent know-how in System Verilog, UVM, and verification tools: Xcelium, Verdi and vManager or similar
• Good knowledge of RTL design (HDL) and digital or mixed-signal circuits
• Knowledge of GIT, Python, and other programming languages as a plus

For Austria (Villach): We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group H (https://www.feei.at/aktuelles/mindestloehne-und-gehaelter-eei/). The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills.

#WeAreIn for driving decarbonization and digitalization.

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in?

We are on a journey to create the best Infineon for everyone.

This means we embrace diversity and inclusion and welcome everyone for who they are.

At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities.

We base our recruiting decisions on the applicant´s experience and skills.

Learn more about our various contact channels.

We look forward to receiving your resume, even if you do not entirely meet all the requirements of the job posting.

Pay Information

Indicative Salary Range:

Pavia, Italy 50400€ - 69300€

The stated salary comprises annual base pay and target variable compensation.

The starting salary is determined using objective, gender neutral criteria, including relevant experience, qualifications, and role scope; prior compensation is not requested or considered.

Employees also benefit from a comprehensive total rewards package, which may include further compensation and benefit elements depending on local regulations and company policies.