Senior Digital Verification Engineer — CR/Assertion‑Driven

IMS Nanofabrication; Wien; Vor Ort; EUR 63.000 - 77.000; Vollzeit

Benefits dieser Stelle

Career development

Flexible hours

Work from home

Health services

Bonus program

Team events

Employee discounts

Zusammenfassung

IMS Nanofabrication, a global leader in semiconductor technology, seeks a Digital Verification Engineer to own the verification strategy, develop reusable testbenches, and drive sign-off readiness for IPs and subsystems. You will work with Digital Design Engineers and System Architects to close coverage gaps and advance verification best practices across projects.

You will implement verification plans, create constrained-random and assertion-based environments, and manage regression with

Qualifikationen

• Bachelor's or Master's degree in Electrical/ Electronics or Computer Engineering or related technical discipline.
• 5+ years of digital IC verification experience in the semiconductor industry.
• Strong SystemVerilog and UVM expertise with verification methodologies.
• Hands-on with constrained-random, SVA, and coverage-driven verification.
• Experience with simulators, debuggers, and waveform analysis tools.
• Proficient in Python or Tcl scripting; familiar with version control and regression management.
• Experience with SoC verification and cross-functional collaboration.

Aufgaben

• Own verification planning for IPs/subsystems including scope, strategy, and coverage goals.
• Develop and maintain reusable verification environments and testbenches.
• Ensure full verification of functional requirements via directed, constrained-random, SVA, and coverage-driven methods.
• Track coverage metrics and drive verification closure against targets.
• Identify defects and perform root-cause analysis with design teams.
• Develop assertions, checkers, scoreboards, and monitors to improve effectiveness.
• Manage regression, execution monitoring, and status reporting.
• Review specifications with system architects to ensure verifiable requirements.
• Support sign-off reviews with evidence of verification completeness and risk analysis.
• Drive productivity via automation, scripting, tools optimization, and reusable assets.
• Evaluate new verification methodologies and technologies, aligning with projects.
• Ensure deliverables meet milestones while identifying risks; mentor junior engineers.

Kenntnisse

SystemVerilog

UVM-based verification

Constrained-random

Assertion-based (SVA)

Coverage-driven verification

Python scripting

Tcl scripting

SoC verification

Waveform analysis

Debugging complex designs

Ausbildung

Bachelor's or Master's in EE/CS

Tools

Industry simulators

Debuggers

Waveform analysis tools

Jobbeschreibung

IMS Nanofabrication, a global leader in semiconductor technology, seeks a Digital Verification Engineer to own the verification strategy, develop reusable testbenches, and drive sign-off readiness for IPs and subsystems. You will work with Digital Design Engineers and System Architects to close coverage gaps and advance verification best practices across projects.

You will implement verification plans, create constrained-random and assertion-based environments, and manage regression with