IC Package / PCB Layout Engineer (d/m/f)

ams-OSRAM AG; Oberpremstätten; On-site; EUR 70,000 - 90,000; Full time

Job summary

ams OSRAM AG in Austria is seeking an experienced RF/High-Frequency IC layout engineer to develop substrate and PCB layouts for sensor and mixed-signal applications. You will optimize for SI/PI and RF performance while collaborating with EMC, analog, package, and IC teams.

The role requires 6+ years in the semiconductor industry, strong Cadence Allegro and Altium skills, and expertise in controlled impedance routing, EM concepts, and parasitic control. English is essential; German is beneficial.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Microelectronics, Semiconductor Physics, Computer Engineering, or related field.
• Minimum 6 years of experience in Semiconductor/Electronic Industry.
• Strong experience with Cadence Allegro Suite (Allegro X, APD, Package Designer) and/or Altium Designer.
• Experience with Cadence Virtuoso Suite and Physical Verification Tools such as Siemens Calibre/Candence PVS is highly desirable.
• Knowledge of semiconductor processes, analog/mixed-signal design considerations, and ESD/EMC concepts is a strong benefit.
• Knowledge of controlled impedance routing, electromagnetic coupling, grounding strategies, shielding concepts, and RF matching networks.
• Experience with IC package substrates, HDI PCB technologies, BGA, wirebond, and flip-chip packaging.
• CMOS IC layout experience is highly desirable, providing expertise in parasitic control, matching techniques, device placement, shielding concepts, and chip-package-board co-design.
• Good technical English is a must; German is beneficial.

Responsibilities

• Design and develop RF and high-frequency IC substrate and PCB layouts for sensor and mixed-signal applications.
• Perform RF-aware component placement and transmission line routing, including CPW, microstrip, and stripline implementations.
• Optimize layout for signal integrity (SI), power integrity (PI), and RF performance.
• Create and maintain package substrate and PCB layouts using Cadence Allegro Suite and Altium Designer including libraries and constraints.
• Collaborate with EMC, analog, package, and IC design engineers for chip-package-board co-design and support SI/PI/EM extraction tools.
• Perform design verification and manufacturability reviews, including DRC/ERC checks.
• Supplier selection and qualification for PCB and SMT.

Skills

RF layout

Signal integrity

German language helpful

English language

Grounding & shielding

Parasitic control

Education

Bachelor's or Master's Degree in Electrical Engineering/related field

Tools

Cadence Allegro Suite

Allegro X/APD/Package Designer

Altium Designer

Cadence Virtuoso

Siemens Calibre / PVS

Job description

We are LSP – Light Sensors & Photonics, one of three business units within ams OSRAM, advancing the digitalization of light. At LSP, we go beyond traditional sensing—combining light, silicon, and system expertise to enable digital photonics solutions. Our focus is clear: powering next-generation applications in data centers, AR/VR, mobile and automotive, where light becomes a critical interface for data, perception, and interaction. This evolution marks a shift from components to integrated photonics systems —driving performance, scalability, and innovation in high-growth segments.

• Design and develop RF and high-frequency IC substrate and PCB layouts for sensor, and mixed-signal applications, ensuring compliance with electrical, thermal, and manufacturing requirements
• Perform RF-aware component placement and transmission line routing, including controlled impedance structures, differential pairs, coplanar waveguides (CPW), microstrip, and stripline implementations
• Optimize layout for signal integrity (SI), power integrity (PI), and RF performance, minimizing coupling, crosstalk, insertion loss, return loss, and electromagnetic interference (EMI)
• Create and maintain package substrate and PCB layouts using Cadence Allegro Suite (Allegro X, APD), Altium Designer and/or Siemens PADS including design libraries, stack-ups, and constraint management
• Collaborate with EMC, analog, package, and IC design engineers to support chip-package-board co-design and ensure successful integration of high-frequency circuits and support for simulation activities using SI/PI/EM extraction tools
• Perform design verification and manufacturability reviews, including DRC/ERC checks, fabrication rule compliance
• Supplier selection and qualification for PCB and SMT (surface mount technology), including supply chain and assembly support

• Bachelor's or Master's Degree in Electrical Engineering, Microelectronics, Semiconductor Physics, Computer Engineering, or a related field
• Minimum of 6 years experience in Semiconductor/Electronic Industry
• Strong experience with Cadence Allegro Suite (Allegro X, APD, Package Designer) and/or Altium Designer
• Experience with Cadence Virtuoso Suite and Physical Verification Tools such as Siemens Calibre/Candence PVS of is highly desirable
• Knowledge of semiconductor processes, analog/mixed-signal design considerations, and ESD/EMC concepts is considered a strong benefit
• Knowledge of controlled impedance routing, electromagnetic coupling, grounding strategies, shielding concepts, and RF matching networks
• Experience with IC package substrates, HDI PCB technologies, BGA, wirebond, and flip-chip packaging
• CMOS IC layout experience is highly desirable, providing valuable expertise in parasitic control, matching techniques, device placement, shielding concepts, and chip-package-board co-design
• Good technical English is a must, German is beneficial

We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group G (https://www.feei.at/aktuelles/mindestloehne-und-gehaelter-eei/). We offer a higher compensation depending on your expertise and skills.