FPGA Engineer

Steneg; Wien; On-site; EUR 60,000 - 80,000; Full time

Job summary

A global technology innovator in Austria is seeking an experienced FPGA engineer to design and implement video and image processing architectures for advanced projection display systems. The ideal candidate has 3+ years in FPGA design, proficiency in System Verilog, and a solid understanding of hardware debugging. English fluency is essential, with German being a plus. This role offers the opportunity to work on cutting-edge technologies in augmented reality applications.

Qualifications

• Minimum 3 years of experience in FPGA design and verification.
• Proficient in System Verilog or Verilog; VHDL considered.
• Fluent in English (German is a plus).

Responsibilities

• Convert algorithms into efficient FPGA implementations.
• Define and document RTL and system-level interface requirements.
• Develop test benches and verification strategies for FPGA modules.

Education

Degree in Electrical Engineering, Computer Engineering, or equivalent discipline

Tools

System Verilog

Verilog

VHDL

Xilinx

Intel/Altera

Python

Tcl

Job description

Our Client

Global technology innovator specialized in high-performance laser beam projection systems. The company enables next-generation Augmented Reality platforms by providing compact, efficient, and precise display modules. With a strong focus on embedded vision and real-time video processing, the company blends hardware, optics, and software into vertically integrated solutions.

Mission

Design and implement FPGA-based video and image processing architectures to accelerate the development of advanced projection display systems. Contribute to the development of real-time hardware pipelines, system interfaces, and embedded subsystems, enabling scalable and reliable integration into augmented reality applications.

Responsibilities

FPGA Architecture and Development

• Convert computer vision and image signal processing algorithms into efficient FPGA implementations using System Verilog and vendor‑specific toolchains
• Define and document RTL and system‑level interface requirements
• Build and maintain vendor‑neutral RTL designs suitable for ASIC prototyping
• Ensure timing closure and optimization across FPGA modules

Collaboration and Integration

• Interface with cross‑functional teams (hardware, optics, software) to support system‑level integration
• Communicate technical details with external partners and component suppliers
• Participate in design reviews, code validation, and documentation efforts

System Testing and Verification

• Develop test benches and verification strategies for FPGA modules
• Support bring‑up of real‑time video processing pipelines on prototype systems
• Debug and optimize systems using simulation, logic analysis, and embedded diagnostics

Required Qualifications

• Degree in Electrical Engineering, Computer Engineering, or equivalent discipline
• Minimum 3 years of experience in FPGA design and verification
• Proficient in System Verilog or Verilog; VHDL considered
• Experience with at least one major FPGA platform (Xilinx or Intel/Altera) and related toolchains
• Experience with modular RTL architecture and FPGA system‑level design
• Solid understanding of timing constraints, synthesis, and hardware debugging
• Competence in C for hardware bring‑up; scripting knowledge in Python or Tcl
• Fluent in English (German is a plus)

Preferred Experience

• Exposure to image or video signal processing in real‑time systems
• Experience in ASIC prototyping workflows
• Familiarity with interfacing standards (AXI, I2C, SPI, MIPI)
• Prior work in cross‑functional hardware/software teams