Yield Enhancement Engineer: Defect & Yield Champion

TSMC; Camas (WA); On-site; USD 87,000 - 116,000; Full time

Benefits offered by this job

Sign-On Bonus

Relocation Assistance

Profit sharing

Incentive bonuses

Tuition assistance

Job summary

TSMC Washington in Camas, WA is seeking a Yield Enhancement Defect Engineer to identify and eradicate defect sources that limit wafer yields. You will work in a high-volume cleanroom, applying metrology, data analytics, and cross-functional collaboration to prevent excursions and optimize CMOS processes.

The role emphasizes defect reduction, root-cause analysis, and collaboration with fabrication modules to improve yield and chip quality.

Qualifications

• Requires degrees in a STEM field and knowledge of CMOS fabrication and failure analysis.
• Familiar with SPC concepts and statistical data analysis.
• Strong communication and teamwork skills; self-starting and motivated.

Responsibilities

• Defect Reduction & Yield Improvement through data-driven methods.
• Root-Cause Analysis using PFA, statistical monitoring, and electrical characterization.
• Defect roadmapping with integration and module teams; continuous improvement.
• Metrology, inline inspection management, and tool ownership responsibilities.
• Program, tune, and advance inline recipes to improve defect detection.

Skills

Semiconductor physics knowledge

CMOS fabrication processes

Failure analysis methodologies

Statistical modeling software

SPC and data analysis

Communication skills

Project management

Problem solving

Education

Bachelor’s, Master’s, or Ph.D. in Materials Science, Electrical Engineering, Chemical Engineering, Physics, or related STEM fields

Tools

Inline defect inspection tools

Job description

TSMC Washington in Camas, WA is seeking a Yield Enhancement Defect Engineer to identify and eradicate defect sources that limit wafer yields. You will work in a high-volume cleanroom, applying metrology, data analytics, and cross-functional collaboration to prevent excursions and optimize CMOS processes.

The role emphasizes defect reduction, root-cause analysis, and collaboration with fabrication modules to improve yield and chip quality.