VLSI/ASIC Design Engineer — RTL, Verilog, FPGA

Advanced Micro Devices, Inc.; San Jose (CA); On-site; USD 150,000 - 210,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

Advanced Micro Devices, Inc. in San Jose is seeking a Silicon Design Engineer to research, design, develop, and test electronic components for ASICs and semiconductor devices.

You will perform architecture, logic design, and system simulations, and contribute to the development of complex ICs, including layout considerations and timing/power analysis. Under supervision, you’ll apply engineering principles, utilize Verilog, C++, Python, and scripting, and work with RTL concepts and STA methods to

Qualifications

• Master’s degree in Computer Engineering, Electrical Engineering, Electrical and Computer Engineering, Electronic Engineering, or related field.
• Experience may be gained through graduate-level coursework, research, or internship experience.

Responsibilities

• Research, design, develop, and/or test electronic components and systems for semiconductor devices.
• Define architecture design, logic design, and system simulation.
• Define module interfaces/formats for simulation and contribute to multidimensional IC designs.
• Evaluate process flow from high-level designs to synthesis, place and route, timing and power use.

Skills

RTL design

VLSI fundamentals

High-speed digital

Formal verification tools

Verilog/Python/C++ scripting

FPGA tooling

STA timing methods

Education

Master’s degree in Computer Engineering / Electrical Engineering / Electrical and Computer Engineering / Electronic Engineering

Job description

Advanced Micro Devices, Inc. in San Jose is seeking a Silicon Design Engineer to research, design, develop, and test electronic components for ASICs and semiconductor devices.

You will perform architecture, logic design, and system simulations, and contribute to the development of complex ICs, including layout considerations and timing/power analysis. Under supervision, you’ll apply engineering principles, utilize Verilog, C++, Python, and scripting, and work with RTL concepts and STA methods to