Verification Engineer II — AI Vision SoC for Edge

CHS OU Ambarella (Shanghai) Company Ltd; United States; Vor Ort; USD 110.000 - 180.000; Vollzeit

Benefits dieser Stelle

Competitive compensation

Excellent benefits

Career development opportunities

Zusammenfassung

CHS OU Ambarella (Shanghai) Company Ltd is seeking a talented Verification Engineer to join our semiconductor team in the United States. You will verify digital logic, develop testbenches, and validate video/image processing solutions for edge devices.

You will build advanced testbenches, create test plans, and drive system-level verification, collaborating with RTL, architecture, and software teams to ensure robust coverage.

Qualifikationen

• Master's degree in Electrical or Computer Engineering required.
• Strong hands-on SystemVerilog and UVM experience.
• Proficiency in C/C++, scripting languages and debug tools.

Aufgaben

• Develop advanced testbenches using UVM, SystemVerilog, Verilog, C/C++, and scripting languages.
• Create and execute comprehensive test plans for DSP blocks, control logic, and cores.
• Debug and validate a media processor platform with verification tools.
• Perform functional coverage analysis and drive system-level verification.
• Collaborate with RTL, architecture, and software teams to ensure coverage.

Kenntnisse

SystemVerilog

UVM

Verilog

C/C++

Python

Perl

Scripting languages

Testbench development

Debug and validation

Ausbildung

Master’s degree in Electrical Engineering or Computer Engineering

Tools

CAD tools

Jobbeschreibung

CHS OU Ambarella (Shanghai) Company Ltd is seeking a talented Verification Engineer to join our semiconductor team in the United States. You will verify digital logic, develop testbenches, and validate video/image processing solutions for edge devices.

You will build advanced testbenches, create test plans, and drive system-level verification, collaborating with RTL, architecture, and software teams to ensure robust coverage.