Verification Engineer II

Ambarella; United States; On-site; USD 120,000 - 180,000; Full time

Job summary

Ambarella seeks a Verification Engineer to join its semiconductor team and verify complex digital logic for edge AI vision devices. You will develop advanced testbenches, run comprehensive test plans, and validate DSP blocks, control logic, and media processor components.

The role demands expertise in SystemVerilog, UVM, Verilog, C/C++, Python, and strong problem-solving abilities to ensure robust hardware/software integration.

Qualifications

• Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• Strong hands-on experience with SystemVerilog and UVM methodology.
• Solid understanding of digital design concepts and SoC architecture.
• Proficiency in C/C++, scripting languages (Python, Perl), and simulation/debug tools.
• Experience with functional and code coverage methodologies.

Responsibilities

• Develop advanced testbenches using UVM, SystemVerilog, Verilog, C/C++, and scripting languages.
• Create and execute comprehensive test plans for DSP blocks, control logic, and processor cores.
• Debug and validate a media processor platform and driver stacks.
• Perform functional coverage analysis and drive system-level verification.

Skills

SystemVerilog

UVM

C/C++

Python

Verilog

Education

Master’s degree in Electrical Engineering or Computer Engineering

Tools

CAD tools

Job description

AI Vision Processors For Edge ApplicationsOur solutions make cameras smarter by extracting valuable data from high-resolution video streams.Job DescriptionWe are seeking a talented and motivated Verification Engineer to join our cutting-edge semiconductor development team. In this role, you will be responsible for verifying complex digital logic designs, developing testbenches, and contributing to the validation of next-generation video and image processing solutions.Key Responsibilities:Develop advanced testbenches using UVM, SystemVerilog, Verilog, C/C++, and scripting languages.Create and execute comprehensive test plans for:Digital signal processing (DSP) blocksControl logic modulesGeneral-purpose processor coresDebug and validate a complex media processor platform using UVM, Verilog/SystemVerilog, C/C++, Python, and Perl.Perform functional coverage analysis using industry-standard CAD tools.Drive system-level verification of key components, including Ambarella’s image processing pipeline, video compression engine, and neural network vector processor.Develop custom verification tools and scripts to streamline verification flows.Collaborate closely with RTL design, architecture, and software teams to ensure thorough validation coverage.Qualifications:Master’s degree in Electrical Engineering, Computer Engineering, or related field (MSEE/M.S. CE required).Strong hands-on experience with SystemVerilog and UVM methodology.Solid understanding of digital design concepts and SoC architecture.Proficiency in C/C++, scripting languages (Python, Perl), and simulation/debug tools.Experience with functional and code coverage methodologies.Excellent problem-solving and communication skills.Preferred Qualifications:Knowledge of video compression and decompression algorithms (e.g., H.264, H.265).Familiarity with memory technologies and subsystems (DDR4, LPDDR3, LPDDR4).Prior experience verifying large-scale media or image processing SoCs.Why Join Us?Work on industry-leading products in an innovative and collaborative environment.Make a direct impact on technologies used in autonomous vehicles, smart cameras, and more.Competitive compensation, excellent benefits, and career development opportunities.