AI Vision SoC Verification Engineer II

Ambarella; United States; Sur place; USD 120 000 - 180 000; Plein temps

Résumé du poste

Ambarella seeks a Verification Engineer to join its semiconductor team and verify complex digital logic for edge AI vision devices. You will develop advanced testbenches, run comprehensive test plans, and validate DSP blocks, control logic, and media processor components.

The role demands expertise in SystemVerilog, UVM, Verilog, C/C++, Python, and strong problem-solving abilities to ensure robust hardware/software integration.

Qualifications

• Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• Strong hands-on experience with SystemVerilog and UVM methodology.
• Solid understanding of digital design concepts and SoC architecture.
• Proficiency in C/C++, scripting languages (Python, Perl), and simulation/debug tools.
• Experience with functional and code coverage methodologies.

Responsabilités

• Develop advanced testbenches using UVM, SystemVerilog, Verilog, C/C++, and scripting languages.
• Create and execute comprehensive test plans for DSP blocks, control logic, and processor cores.
• Debug and validate a media processor platform and driver stacks.
• Perform functional coverage analysis and drive system-level verification.

Connaissances

SystemVerilog

UVM

C/C++

Python

Verilog

Formation

Master’s degree in Electrical Engineering or Computer Engineering

Outils

CAD tools

Description du poste

Ambarella seeks a Verification Engineer to join its semiconductor team and verify complex digital logic for edge AI vision devices. You will develop advanced testbenches, run comprehensive test plans, and validate DSP blocks, control logic, and media processor components.

The role demands expertise in SystemVerilog, UVM, Verilog, C/C++, Python, and strong problem-solving abilities to ensure robust hardware/software integration.