Senior Verification Engineer - AI-Driven SoC & Vision

Ambarella; United States; Presencial; USD 165.000 - 175.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

RSU grants

Competitive benefits

Descripción de la vacante

Ambarella is seeking an experienced Senior Verification Engineer to lead verification of advanced SoCs featuring image and video processing, DSPs, CPUs, and neural network accelerators. You will own verification strategies, develop scalable testbenches, drive coverage closure, and tackle complex design issues in a fast-paced AI-centric environment.

You will collaborate with architecture, RTL, firmware, and software teams, mentor junior engineers, and advance agentic AI verification workflows to

Formación

• Master's degree or higher in a relevant engineering field.
• 5+ years of ASIC/SoC verification experience.
• Strong knowledge of SystemVerilog, UVM, constrained-random verification, assertions, and coverage.
• Experience architecting complex verification environments and driving coverage closure.
• Strong programming skills in C/C++ and Python.

Responsabilidades

• Define and execute verification strategies and test plans for complex digital IP, subsystems, and SoCs.
• Architect and develop reusable verification environments using SystemVerilog, UVM, Verilog, C/C++, and Python.
• Lead verification of image processing pipelines, video input, compression engines, DSP blocks, processor cores, and neural network accelerators.
• Develop constrained-random tests, reference models, assertions, scoreboards, and coverage models.
• Drive functional and code coverage closure and lead complex RTL and system-level debugging.
• Use and extend agentic AI verification workflows for test generation, coverage analysis, failure triage, debugging, and regression automation.
• Collaborate with internal AI experts to improve verification workflows and integrate new capabilities.
• Develop automation tools and optimize simulation and regression efficiency.
• Collaborate with architecture, RTL design, firmware, and software teams.
• Mentor junior engineers and interns, review verification deliverables, and provide technical leadership.

Conocimientos

SystemVerilog

UVM

Verilog

C/C++

Python

Constrained-random verification

Assertions

Coverage methodologies

RTL debugging

SoC verification

Educación

Master's degree in Electrical Engineering, Computer Engineering, or a related field

Herramientas

Commercial simulation tools

Descripción del empleo

Ambarella is seeking an experienced Senior Verification Engineer to lead verification of advanced SoCs featuring image and video processing, DSPs, CPUs, and neural network accelerators. You will own verification strategies, develop scalable testbenches, drive coverage closure, and tackle complex design issues in a fast-paced AI-centric environment.

You will collaborate with architecture, RTL, firmware, and software teams, mentor junior engineers, and advance agentic AI verification workflows to