Verification Engineer II - AI Vision Processors

VisLab (an Ambarella Inc. company); Kentucky; On-site; USD 90,000 - 150,000; Full time

Job summary

VisLab (an Ambarella Inc. company) in the United States is seeking a Verification Engineer to verify complex digital logic designs, develop testbenches, and validate next-generation video and image processing solutions.

You will collaborate with RTL design, architecture, and software teams, build advanced testbenches with SystemVerilog/UVM, drive coverage, and contribute to a scalable verification flow for media processors and neural processing components.

Qualifications

• Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• Strong hands-on experience with SystemVerilog and UVM.
• Solid understanding of digital design concepts and SoC architecture.
• Proficiency in C/C++, scripting languages (Python, Perl), and simulation/debug tools.

Responsibilities

• Develop advanced testbenches using UVM, SystemVerilog, Verilog, C/C++, and scripting languages.
• Create and execute comprehensive test plans for: Digital signal processing (DSP) blocks; Control logic modules; General-purpose processor cores.
• Debug and validate a complex media processor platform using UVM, Verilog/SystemVerilog, C/C++, Python, and Perl.
• Perform functional coverage analysis using industry-standard CAD tools.
• Drive system-level verification of key components, including Ambarella’s image processing pipeline, video compression engine, and neural network vector processor. Develop custom verification tools and scripts to streamline verification flows.
• Collaborate closely with RTL design, architecture, and software teams to ensure thorough validation coverage.

Skills

SystemVerilog

UVM

C/C++

Python

Problem solving

Education

MSEE / MS CE

Tools

Verilog

Simulation tools

Job description

VisLab (an Ambarella Inc. company) in the United States is seeking a Verification Engineer to verify complex digital logic designs, develop testbenches, and validate next-generation video and image processing solutions.

You will collaborate with RTL design, architecture, and software teams, build advanced testbenches with SystemVerilog/UVM, drive coverage, and contribute to a scalable verification flow for media processors and neural processing components.