Senior AI Vision SoC Verification Engineer

VisLab (an Ambarella Inc. company); Kentucky; On-site; USD 165,000 - 175,000; Full time

Benefits offered by this job

RSU grants

Annual RSU grants

Competitive benefits

Job summary

Ambarella is seeking an experienced Senior Verification Engineer to lead verification of advanced SoCs with image and video processing, DSPs, CPUs, and neural network accelerators. You will own verification strategies, build scalable testbenches, and drive coverage closure.

Work will involve agentic AI verification flows, test generation, regression automation, and collaboration with architecture, RTL, firmware, and software teams.

Qualifications

• Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• Typically 5+ years of ASIC or SoC verification experience, or equivalent expertise.
• Deep knowledge of SystemVerilog, UVM, constrained-random verification, assertions, and coverage methodologies.
• Experience architecting complex verification environments and driving coverage closure.
• Strong understanding of digital design, computer architecture, and SoC integration.
• Advanced RTL and system-level debugging skills.
• Strong programming skills in C/C++ and Python.
• Experience with commercial simulation, debugging, and coverage tools.
• Ability to independently lead verification projects and collaborate across teams.

Responsibilities

• Define and execute verification strategies and test plans for complex digital IP, subsystems, and SoCs.
• Architect and develop reusable verification environments using SystemVerilog, UVM, Verilog, C/C++, and Python.
• Lead verification of image processing pipelines, video input, compression engines (including CABAC), DSP blocks, processor cores, and neural network accelerators.
• Develop constrained-random tests, reference models, assertions, scoreboards, and coverage models.
• Drive functional and code coverage closure and lead complex RTL and system-level debugging.
• Use, enhance, and extend agentic AI verification workflows for test generation, coverage analysis, failure triage, debugging, and regression automation.
• Collaborate with internal AI experts to identify opportunities for improving verification workflows and integrating new capabilities.
• Develop automation tools and optimize simulation and regression efficiency.
• Collaborate with architecture, RTL design, firmware, and software teams.
• Mentor junior engineers and interns, review verification deliverables, and provide technical leadership.

Skills

SystemVerilog

UVM

Constrained-random

Assertions

Coverage modeling

C/C++

Python

RTL debugging

SoC verification

Testbench development

Education

Master's degree in Electrical Engineering

Tools

Simulation tools

Job description

Ambarella is seeking an experienced Senior Verification Engineer to lead verification of advanced SoCs with image and video processing, DSPs, CPUs, and neural network accelerators. You will own verification strategies, build scalable testbenches, and drive coverage closure.

Work will involve agentic AI verification flows, test generation, regression automation, and collaboration with architecture, RTL, firmware, and software teams.