Ultra-Low-Power Analog IC Design Engineer (Tapeout)

waveworks; Seattle (WA); On-site; USD 120,000 - 210,000; Full time

Job summary

WaveWorks in Seattle seeks an Analog Design Engineer to design and verify ultra-low-power analog/mixed-signal blocks for wireless endpoint chips. You will own blocks from spec through tapeout and collaborate with digital design, verification, and system architecture.

Responsibilities include designing biasing, LDOs, oscillators, PLLs at nanoamp currents, building SystemVerilog/Verilog-AMS models, driving layout for leakage control, and silicon characterization to guide revisions.

Qualifications

• BS in Electrical Engineering with 5+ years analog IC design experience or higher degrees.
• Experience bringing analog blocks through tapeout in a CMOS process.
• Familiarity with corner and Monte Carlo analysis; SystemVerilog/Verilog-AMS modeling.

Responsibilities

• Design ultra-low-power analog and mixed-signal blocks (bias, LDOs, regulators, oscillators, PLLs).
• Work with process, leakage, noise, and mismatch across PVT.
• Create SystemVerilog-AMS and Verilog-AMS models and run mixed-signal simulations.
• Drive layout for low leakage and matching; review parasitics.
• Characterize silicon in the lab and feed results into next revision.

Skills

Analog IC design

Cadence Virtuoso

SystemVerilog/Verilog-AMS

Subthreshold design

Cross-functional collaboration

Education

BS in Electrical Engineering

MS in Electrical Engineering

PhD in EE

Tools

Cadence Spectre

Job description

WaveWorks in Seattle seeks an Analog Design Engineer to design and verify ultra-low-power analog/mixed-signal blocks for wireless endpoint chips. You will own blocks from spec through tapeout and collaborate with digital design, verification, and system architecture.

Responsibilities include designing biasing, LDOs, oscillators, PLLs at nanoamp currents, building SystemVerilog/Verilog-AMS models, driving layout for leakage control, and silicon characterization to guide revisions.