Ultra-Low-Power Analog IC Design Engineer

WaveWorks Technologies; Seattle (WA); On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Comprehensive benefits package

Job summary

WaveWorks is seeking an experienced Analog Design Engineer to join our silicon team in downtown Seattle. This hands-on, individual-contributor role owns analog and mixed-signal blocks from specification through tapeout and silicon bring-up, collaborating with digital design, verification, and system architecture.

Ideal candidates have a BS in Electrical Engineering and 5+ years of analog IC design, hands-on experience with Cadence Virtuoso/Spectre, and proven tapeout success.

Qualifications

• BS in Electrical Engineering and 5+ years of analog IC design experience.
• Proven tapeout experience in CMOS processes.
• Fluency with Cadence Virtuoso and Spectre, including corner and Monte Carlo analysis.
• Experience with AMS design and verification (SystemVerilog/Verilog-AMS or real-number models).
• Strong understanding of leakage, noise, and mismatch.

Responsibilities

• Design ultra-low-power analog and mixed-signal blocks: bias and reference generation, LDOs, and PLLs.
• Define power domains and power-management behavior for always-on, duty-cycled operation.
• Build SystemVerilog and Verilog-AMS models and run mixed-signal simulations.
• Drive layout for low leakage and matching, review parasitic-extracted results.
• Characterize silicon, correlate measurements with simulations, feed results into next revision.

Skills

Analog IC design

Tapeout experience

Cadence Virtuoso

Spectre

SystemVerilog/Verilog-AMS

Education

BS in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

Verilog-AMS

SystemVerilog

Job description

WaveWorks is seeking an experienced Analog Design Engineer to join our silicon team in downtown Seattle. This hands-on, individual-contributor role owns analog and mixed-signal blocks from specification through tapeout and silicon bring-up, collaborating with digital design, verification, and system architecture.

Ideal candidates have a BS in Electrical Engineering and 5+ years of analog IC design, hands-on experience with Cadence Virtuoso/Spectre, and proven tapeout success.