Analog IC Design Engineer

waveworks; Seattle (WA); On-site; USD 120,000 - 210,000; Full time

Job summary

WaveWorks in Seattle seeks an Analog Design Engineer to design and verify ultra-low-power analog/mixed-signal blocks for wireless endpoint chips. You will own blocks from spec through tapeout and collaborate with digital design, verification, and system architecture.

Responsibilities include designing biasing, LDOs, oscillators, PLLs at nanoamp currents, building SystemVerilog/Verilog-AMS models, driving layout for leakage control, and silicon characterization to guide revisions.

Qualifications

• BS in Electrical Engineering with 5+ years analog IC design experience or higher degrees.
• Experience bringing analog blocks through tapeout in a CMOS process.
• Familiarity with corner and Monte Carlo analysis; SystemVerilog/Verilog-AMS modeling.

Responsibilities

• Design ultra-low-power analog and mixed-signal blocks (bias, LDOs, regulators, oscillators, PLLs).
• Work with process, leakage, noise, and mismatch across PVT.
• Create SystemVerilog-AMS and Verilog-AMS models and run mixed-signal simulations.
• Drive layout for low leakage and matching; review parasitics.
• Characterize silicon in the lab and feed results into next revision.

Skills

Analog IC design

Cadence Virtuoso

SystemVerilog/Verilog-AMS

Subthreshold design

Cross-functional collaboration

Education

BS in Electrical Engineering

MS in Electrical Engineering

PhD in EE

Tools

Cadence Spectre

Job description

WaveWorks makes wireless communication solutions for the next wave of connected devices. WaveWorks' unique technology provides extremely low cost, small form factor, and orders of magnitude lower power consumption, while achieving long operating range and high reliability. WaveWorks is expanding its engineering team and searching for high performing, dedicated individuals to help blaze new trails.

ROLE DESCRIPTION

WaveWorks designs wireless endpoint chips whose power budget is measured in nanoamps. The Analog Design Engineer designs, simulates and verifies the analog and mixed-signal blocks of these chips, where every block is judged first by the current it draws. The work sits on the company's current architectural charter: reducing active and sleep power far below what conventional radios achieve, while keeping range and reliability.

This is a hands-on individual-contributor role on a small silicon team. The engineer owns blocks from specification through tapeout and silicon bring-up, and works closely with digital design, verification, and system architecture.

• Design ultra-low-power analog and mixed-signal blocks: bias and reference generation, low-dropout regulators and power switches, oscillators and PLLs, and control loops.
• Design at nanoamp bias currents and low signal levels, managing leakage, noise, offset and mismatch across process, voltage and temperature.
• Define power domains and power-management behavior for always-on, duty-cycled operation, with an energy budget for each block.
• Build SystemVerilog and Verilog-AMS behavioral models of analog blocks, and run block-level and chip-level mixed-signal simulation with the digital design.
• Drive layout for low leakage and matching, and review parasitic-extracted results.
• Characterize silicon in the lab, correlate measurements with simulation, and feed results into the next revision.

REQUIRED QUALIFICATIONS

• BS in Electrical Engineering plus 5 or more years of analog IC design experience, MS plus 3 or more years, or a PhD degree.
• Proven record of taking analog blocks through tapeout in a CMOS process, and bringing them up on silicon.
• Fluency with Cadence Virtuoso and Spectre, or equivalent tools, including corner and Monte Carlo analysis.
• Mixed-signal (AMS) design and verification experience, including SystemVerilog and Verilog-AMS or real-number models for block-level and chip-level simulation.
• Strong command of subthreshold design, leakage, noise, and mismatch.
• Ability to write clear block specifications and work across analog, digital and verification teams.

PREFERRED QUALIFICATIONS

• Power management for very low power IoT or wearable devices.
• Low-power RF or wireless transceiver design, including PLLs, oscillators, and wake-up receivers.
• Energy harvesting, intermittent power, or battery-free system design.
• Advanced-node CMOS design for low leakage.
• Experience at an early-stage company, owning several blocks at once.

With its unique technology, WaveWorks is positioned to meet the needs of a plethora of applications of wireless connectivity that are not well served by conventional wireless solutions. Join us as we work to capture this opportunity and become a significant force in wireless.

WaveWorks is committed to a friendly and welcoming working environment, and has a comprehensive benefits package for full time employees. WaveWorks does not discriminate based on race, gender, age, religious affiliation, or any other legally protected status.

WaveWorks is located in downtown Seattle, Washington.