Analog IC Design Engineer - Ultra-Low-Power Wireless

WaveWorks Technologies Inc; Seattle (WA); On-site; USD 120,000 - 180,000; Full time

Job summary

WaveWorks Technologies Inc in Seattle is seeking an Analog Design Engineer to design ultra-low-power analog and mixed-signal blocks for wireless endpoints. You will own blocks from specification through tapeout and silicon bring-up, collaborating with digital design, verification, and system architects.

Responsibilities include bias and reference generation, LDOs, oscillators, PLLs, power-domain planning, and building behavioral models for verification.

Qualifications

• Bachelor’s degree in Electrical Engineering with 5+ years analog IC design; advanced degrees optional.
• Hands-on experience from spec to tapeout and silicon bring-up.
• Proficient with Cadence tools and AMS modeling.

Responsibilities

• Design ultra-low-power analog and mixed-signal blocks: bias and reference generation, LDOs, power switches, oscillators and PLLs, and control loops.
• Design at nanoamp bias currents and low signal levels, managing leakage, noise, offset and mismatch across PVT.
• Define power domains and power-management behavior for always-on, duty-cycled operation, with an energy budget for each block.
• Build SystemVerilog and Verilog-AMS behavioral models of analog blocks, and run block-level and chip-level mixed-signal simulation with the digital design.
• Drive layout for low leakage and matching, and review parasitic-extracted results.
• Characterize silicon in the lab, correlate measurements with simulation, and feed results into the next revision.

Skills

Analog IC design

Tapeout experience

Cadence Virtuoso

Spectre

AMS design

SystemVerilog

Education

BS Electrical Engineering

MS

PhD

Tools

Cadence Virtuoso

Spectre

Verilog-AMS

SystemVerilog

Job description

WaveWorks Technologies Inc in Seattle is seeking an Analog Design Engineer to design ultra-low-power analog and mixed-signal blocks for wireless endpoints. You will own blocks from specification through tapeout and silicon bring-up, collaborating with digital design, verification, and system architects.

Responsibilities include bias and reference generation, LDOs, oscillators, PLLs, power-domain planning, and building behavioral models for verification.