Senior ATE Test Infra Engineer - Post-Silicon NPI for TPU

Google; Sunnyvale (CA); On-site; USD 163,000 - 236,000; Full time

Job summary

Google Sunnyvale is seeking an SoC Test Infrastructure Engineer to drive post-silicon NPI and test strategies for TPU and HPC products. You will develop and validate automated ATE programs and pre-silicon test solutions to accelerate silicon bring-up and mass production.

You’ll contribute to AI/ML hardware acceleration with a focus on TPU architecture, verification, and integration into AI/ML-driven systems, collaborating with cross-functional teams across design, verification, and manufacturing.

Qualifications

• Bachelor's degree in EE/CE/CS or equivalent practical experience.
• 8 years of test engineering experience.
• Experience in Python, Java, C#, or C/C++.
• Experience with Advantest or Teradyne platforms.

Responsibilities

• Collaborate with Architecture, Design, and Verification teams to develop test strategies and solutions for HPC products.
• Verify test solutions on pre-silicon models and develop ATE modules, DC tests, binning, production, and characterization flows.
• Develop and validate ATE programs for NPI in preparation for high-volume manufacturing with vendors and cross-functional teams.
• Build tools and workflows to automate the testing lifecycle.
• Partner with upstream and downstream teams to enable automated testing solutions.

Skills

Python

Java

C#

C/C++

Education

Bachelor's degree in EE/CE/CS or equivalent

Master's degree or PhD in EE/CE/CS

Tools

Advantest

Teradyne

ATE platforms

Job description

Google Sunnyvale is seeking an SoC Test Infrastructure Engineer to drive post-silicon NPI and test strategies for TPU and HPC products. You will develop and validate automated ATE programs and pre-silicon test solutions to accelerate silicon bring-up and mass production.

You’ll contribute to AI/ML hardware acceleration with a focus on TPU architecture, verification, and integration into AI/ML-driven systems, collaborating with cross-functional teams across design, verification, and manufacturing.