TPU DFT Engineer for AI/ML Cloud Silicon

Google

Sunnyvale (CA)

On-site

USD 138,000 - 197,000

Full time

14 days+

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Job summary

Google is seeking a DFT Engineer to shape the future of AI/ML hardware acceleration, contributing to TPU architecture and its integration within AI/ML systems. You will verify complex digital designs, define and deploy advanced DFT methodologies, including MBIST and JTAG, in collaboration with Design and Physical teams.

The role combines design and verification expertise with cutting-edge silicon technology.

Qualifications

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
3 years of experience in DFT architecture, implementation, ATPG, and verification for SoCs.
Experience with industry-standard test methodologies and platforms, such as ATE, MBIST, JTAG, or System Level Test (SLT).

Responsibilities

Complete all Test Design Rule Checks (TDRC) and Design changes to fix TDRC violations to achieve high test quality.
Insert DFT logic, including scan chains, MBIST, Test Access Port (TAP) controller, Clock Control block, and other DFT IP blocks.
Insert and hook up MBIST logic including test collar around memories, MBIST controllers, electronic fuse (eFuse) logic and connect to core and TAP interfaces.
Design Verification of DFT logic and test pattern generation.
Design and Implement System Level Test strategy.