Staff TPU Interconnect & Optical Packaging Engineer

Google LLC; Sunnyvale (CA); Presencial; USD 192.000 - 278.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Equity

Bonus target

Benefits

Descripción de la vacante

Google LLC in Sunnyvale, CA is seeking a Staff Hardware Engineer to lead TPU interconnects and optical packaging. You will drive architecture, alignment with foundries, and cross-functional teams to deliver multi-terabit packaging capabilities for next-gen TPU systems.

The role requires in-person interviews and extensive experience in semiconductor packaging, interconnect design, and deep silicon photonics expertise for HPC/AI accelerators.

Formación

• Bachelor's degree or equivalent in a technical field.
• 10 years of experience in semiconductor packaging, integration or interconnect design.
• Experience with interconnect modeling and 2.5D/3D interposer rules.

Responsabilidades

• Define architectural strategy and package technology for next-gen TPU systems, incl. 2.5D/3D interposers and CPO modules.
• Drive electro-optical co-design across silicon photonics dies, lasers, substrates and drive electronics.
• Establish SI, power delivery, thermal and mechanical rules for multi-chiplet assemblies.
• Partner with OSATs, foundries and suppliers to co-develop substrate processes and optical interfaces.
• Lead full-lifecycle qualification from pathfinding to mass production and mentor engineers.

Conocimientos

Semiconductor packaging experience

Interconnect modeling

2.5D/3D interposer design

Chiplet packaging

Educación

Bachelor's degree in Electrical Engineering or related field

Descripción del empleo

Google LLC in Sunnyvale, CA is seeking a Staff Hardware Engineer to lead TPU interconnects and optical packaging. You will drive architecture, alignment with foundries, and cross-functional teams to deliver multi-terabit packaging capabilities for next-gen TPU systems.

The role requires in-person interviews and extensive experience in semiconductor packaging, interconnect design, and deep silicon photonics expertise for HPC/AI accelerators.