Staff PCB Layout Engineer: High-Speed Data Center Boards

Meta; Indianapolis (IN); On-site; USD 173,000 - 245,000; Full time

Job summary

Meta is seeking a Staff PCB Layout Engineer to lead the design and delivery of complex PCBs for data center infrastructure. You will define layout architecture, establish standards, and collaborate across electrical, mechanical, and manufacturing teams to scale from concept to production.

The role emphasizes high-speed interfaces like PCIe and SerDes, with responsibilities spanning signal and power integrity, manufacturability, and continuous improvement of layout methods and tooling.

Qualifications

• 8+ years of PCB layout design for high-speed digital systems.
• Experience with DDR, PCIe, or high-speed SerDes interfaces.
• Experience with Cadence Allegro, Mentor Xpedition, or equivalent.

Responsibilities

• Define PCB layout architecture and floorplanning for complex boards.
• Set design rules and constraints for high-speed interfaces.
• Lead signal and power integrity analyses and apply results.
• Drive DFM reviews with manufacturers to meet yield and cost targets.
• Maintain organization-wide PCB layout standards and templates.
• Collaborate with mechanical engineers on packaging and thermal constraints.
• Provide guidance to layout engineers across programs.
• Evaluate and qualify alternative components and footprints.
• Lead post-layout verification including DRC/ERC checks.
• Introduce new EDA tooling and fabrication tech to improve quality.

Skills

PCB Layout

High-speed design

Signal integrity

Power integrity

DFM/DFX

EDA tooling

Tools

Cadence Allegro

Mentor Xpedition

Job description

Meta is seeking a Staff PCB Layout Engineer to lead the design and delivery of complex PCBs for data center infrastructure. You will define layout architecture, establish standards, and collaborate across electrical, mechanical, and manufacturing teams to scale from concept to production.

The role emphasizes high-speed interfaces like PCIe and SerDes, with responsibilities spanning signal and power integrity, manufacturability, and continuous improvement of layout methods and tooling.