Hardware Engineer, PCB Layout

Meta; Indianapolis (IN); Presencial; USD 173.000 - 245.000; Jornada completa

Descripción de la vacante

Meta is seeking a Staff PCB Layout Engineer to lead the design and delivery of complex PCBs for data center infrastructure. You will define layout architecture, establish standards, and collaborate across electrical, mechanical, and manufacturing teams to scale from concept to production.

The role emphasizes high-speed interfaces like PCIe and SerDes, with responsibilities spanning signal and power integrity, manufacturability, and continuous improvement of layout methods and tooling.

Formación

• 8+ years of PCB layout design for high-speed digital systems.
• Experience with DDR, PCIe, or high-speed SerDes interfaces.
• Experience with Cadence Allegro, Mentor Xpedition, or equivalent.

Responsabilidades

• Define PCB layout architecture and floorplanning for complex boards.
• Set design rules and constraints for high-speed interfaces.
• Lead signal and power integrity analyses and apply results.
• Drive DFM reviews with manufacturers to meet yield and cost targets.
• Maintain organization-wide PCB layout standards and templates.
• Collaborate with mechanical engineers on packaging and thermal constraints.
• Provide guidance to layout engineers across programs.
• Evaluate and qualify alternative components and footprints.
• Lead post-layout verification including DRC/ERC checks.
• Introduce new EDA tooling and fabrication tech to improve quality.

Conocimientos

PCB Layout

High-speed design

Signal integrity

Power integrity

DFM/DFX

EDA tooling

Herramientas

Cadence Allegro

Mentor Xpedition

Descripción del empleo

Summary:

Meta is seeking a Staff PCB Layout Engineer to drive the design and delivery of complex printed circuit boards for large-scale infrastructure hardware. In this role, you will define layout architecture and establish engineering standards for high-speed digital, power delivery, and signal integrity-critical designs that power Meta's data center and infrastructure platforms. You will partner with electrical engineers, mechanical engineers, and manufacturing teams to shape board-level design strategy from concept through mass production, ensuring reliability and performance at scale.

Required Skills:

Hardware Engineer, PCB Layout Responsibilities:

1. Define PCB layout architecture and floorplanning strategies for complex, high-layer-count boards used in infrastructure and data center hardware




2. Establish and own PCB design rules, constraints, and layout guidelines for high-speed interfaces including PCIe, DDR, Ethernet, and SerDes




3. Lead signal integrity and power integrity analysis in collaboration with electrical engineering teams, driving layout decisions based on simulation results




4. Drive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure yield, reliability, and cost targets are met




5. Define and maintain organization-wide PCB layout standards, templates, and best practices adopted across infrastructure hardware programs




6. Collaborate with mechanical engineers to resolve board-level packaging constraints, thermal management requirements, and enclosure integration challenges




7. Provide technical guidance to other layout engineers across multiple concurrent infrastructure hardware programs




8. Partner with supply chain and component engineering teams to evaluate and qualify alternative components and footprints




9. Lead post-layout verification activities including design rule checks, electrical rule checks, and pre-production board bring-up support




10. Evaluate and introduce new EDA tooling, layout methodologies, and fabrication technologies to improve design quality and cycle time

Minimum Qualifications:

Minimum Qualifications:

1. 8+ years of experience in PCB layout design for high-speed digital systems, including boards with DDR, PCIe, or high-speed SerDes interfaces




2. 8+ years of experience with industry-standard EDA layout tools such as Cadence Allegro, Mentor Xpedition, or equivalent




3. Experience defining PCB stack-up configurations, impedance control strategies, and design rule constraints for high-layer-count boards




4. Experience collaborating with signal integrity and power integrity teams to translate simulation results into layout implementation decisions




5. Experience leading PCB layout efforts across the full product development lifecycle from schematic capture through manufacturing release

Preferred Qualifications:

Preferred Qualifications:

1. Experience designing PCBs for data center infrastructure hardware including server, storage, or networking platforms




2. Experience with high-speed (100Gbps+) signal interfaces




3. Experience establishing layout centers of excellence or defining team-wide PCB design standards across multiple concurrent programs




4. Experience with complex designs using custom ASICs

Public Compensation:

$173,000/year to $245,000/year + bonus + equity + benefits

Industry:

Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affciative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [e-mail].