Staff NoC & Fabric Architect for AI Accelerator Systems

OXMIQ Labs, Inc.; Campbell (CA); Presencial; USD 260.000 - 360.000; Jornada completa

Descripción de la vacante

OXMIQ Labs, Inc. is seeking a Staff Design Engineer to architect next-generation interconnect fabrics for scalable AI systems, spanning multi-GPU/TPU clusters and AI accelerators.

You will shape on-chip and multi-chip interconnects, optimize data movement, and drive RTL and silicon validation with cross-functional teams. Role requires deep NoC expertise, experience with high-speed interconnects, memory hierarchy design, and verification methodologies.

Formación

• 10+ years of experience in ASIC or SoC architecture and design.
• Deep understanding of Network-on-Chip (NoC) architectures including meshes, torus, rings, crossbars, hierarchical NoCs or custom fabrics.
• Experience designing communication fabrics for GPUs, TPUs, AI accelerators, HPC processors, or high-performance SoCs.
• Strong knowledge of cache coherency protocols, memory consistency models, and memory hierarchy design.
• Experience with high-speed interconnect technologies such as PCIe, CXL, UCIe, NVLink, Infinity Fabric, or similar technologies.

Responsabilidades

• Design scalable NoC and fabric solutions for multi-GPU, TPU, and AI accelerator systems.
• Define low-latency, high-bandwidth communication architectures for hundreds to thousands of cores.
• Design cache-coherent and non-coherent interconnect protocols for compute, memory, and I/O subsystems.
• Develop routing algorithms, QoS, congestion management, flow control, and deadlock avoidance techniques.
• Define memory hierarchy interactions involving HBM, shared memory, L2, PCIe, CXL, and coherent interconnects.
• Collaborate with architecture, compiler, runtime, and software teams to optimize communication for AI workloads.
• Drive microarchitecture specifications, RTL design reviews, and performance modeling.
• Work with verification teams to develop architecture-level validation plans and benchmarks.
• Analyze workload behavior and identify bottlenecks in large-scale distributed AI systems.

Conocimientos

NoC architectures

Interconnect fabrics

Performance modeling

RTL design

Educación

BS/MS/PhD in Computer Engineering, Electrical Engineering, or CS

Herramientas

Verilog

SystemVerilog

FPGA prototyping

Descripción del empleo

OXMIQ Labs, Inc. is seeking a Staff Design Engineer to architect next-generation interconnect fabrics for scalable AI systems, spanning multi-GPU/TPU clusters and AI accelerators.

You will shape on-chip and multi-chip interconnects, optimize data movement, and drive RTL and silicon validation with cross-functional teams. Role requires deep NoC expertise, experience with high-speed interconnects, memory hierarchy design, and verification methodologies.