Optical Interconnect Architect for AI & Memory Systems

Micron Technology, Inc.

Richardson (TX)

On-site

USD 180,000 - 280,000

Full time

5 days ago
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Job summary

Micron Technology, Inc. seeks an Optical Interconnect Design Architect to define and drive next-generation optical connectivity for memory, AI accelerators, and HPC platforms.

You will lead architecture development, technology pathfinding, feasibility analyses, and ecosystem engagement to enable scalable optical interconnects. The role requires translating photonic concepts into practical architectures, evaluating PICs, silicon photonics, and high‑speed I/O tradeoffs, and collaborating across

Qualifications

  • PhD or equivalent with 5+ years of industry experience in optical interconnects.
  • Strong knowledge of silicon photonics and high-speed I/O systems.
  • Experience with WDM/DWDM, PICs, modulators, detectors.
  • Familiarity with heterogeneous integration and packaging considerations.

Responsibilities

  • Define optical interconnect architectures for memory and AI computing systems.
  • Lead architectural tradeoff studies across electrical and optical interconnects.
  • Drive technology pathfinding and feasibility analyses for future HBM and die-to-die interconnects.
  • Collaborate with internal and external partners on architecture validation and implementation.

Skills

Optical Interconnect Architecture
Silicon Photonics
High-Speed I/O Systems
Optical Communication Systems
WDM/DWDM
Photonic Integrated Circuit design
Architecture tradeoff analysis
AI-assisted analysis
Chiplets / 2.5D/3D integration

Education

PhD in Electrical Engineering, Optics, Photonics, Physics, Computer Engineering, or related

Tools

Photonic IC design tools

Job description

Micron Technology, Inc. seeks an Optical Interconnect Design Architect to define and drive next-generation optical connectivity for memory, AI accelerators, and HPC platforms.

You will lead architecture development, technology pathfinding, feasibility analyses, and ecosystem engagement to enable scalable optical interconnects. The role requires translating photonic concepts into practical architectures, evaluating PICs, silicon photonics, and high‑speed I/O tradeoffs, and collaborating across

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