Staff FPGA Engineer – High-Performance Test Platforms

LitePoint; North Reading (MA); On-site; USD 123,000 - 197,000; Full time

Benefits offered by this job

Medical benefits

Dental benefits

Vision benefits

Retirement plans

Paid vacation

Job summary

Teradyne’s Compute Test Division seeks a Staff FPGA Engineer to design and deliver high-performance FPGA-based solutions at the heart of our test platforms. Base on-site in North Reading, MA, you’ll lead from requirements through bring-up, collaborating with hardware, software, and design verification teams to ensure robust system-level solutions.

The role emphasizes scripting in TCL/Python, timing closure, and mentoring teammates while tackling complex interfaces and timing margins in

Qualifications

• 5+ years of hands-on FPGA design and development.
• Strong expertise in Verilog/SystemVerilog for design and debugging.
• Proven experience with AMD (Xilinx) and/or Intel FPGA toolchains, including synthesis, implementation, and timing closure.
• Strong understanding of digital design fundamentals and the ability to interpret schematics.
• Experience with high-speed interfaces such as PCIe, DDR, SerDes, or similar technologies.
• Scripting proficiency in TCL and Python for automation and tooling.

Responsibilities

• Lead FPGA solutions from requirements through implementation and bring-up.
• Develop high-performance FPGA logic involving complex interfaces and subsystem integration, along with automation and debug tools using TCL and Python.
• Collaborate with hardware, software, systems, and design verification teams to deliver cohesive system-level solutions and achieve appropriate simulation and test coverage.
• Support timing closure, resource optimization, performance tuning, lab bring-up, debugging, and root cause analysis using JTAG and lab instrumentation.
• Partner on PCB and system design decisions that affect FPGA performance and integration.
• Mentor less experienced engineers and provide technical guidance across the team.

Skills

FPGA design

Verilog/SystemVerilog

FPGA toolchains

High-speed interfaces

TCL/Python scripting

Debugging hardware

UVM (preferred)

Tools

Lab instrumentation

Job description

Teradyne’s Compute Test Division seeks a Staff FPGA Engineer to design and deliver high-performance FPGA-based solutions at the heart of our test platforms. Base on-site in North Reading, MA, you’ll lead from requirements through bring-up, collaborating with hardware, software, and design verification teams to ensure robust system-level solutions.

The role emphasizes scripting in TCL/Python, timing closure, and mentoring teammates while tackling complex interfaces and timing margins in