Junior FPGA Engineer: High-Speed Hardware & Systems

LitePoint; North Reading (MA); On-site; USD 99,000 - 158,000; Full time

Benefits offered by this job

Health benefits

Retirement plans

Paid vacation

Tuition assistance

Job summary

Teradyne’s Compute Test Division in North Reading, MA, seeks a Junior FPGA Engineer to design and deliver high-performance FPGA-based solutions at the heart of our test platforms. You will collaborate across hardware, software, and systems teams on fast-paced projects and interface with high-speed buses and diagnostics.

The role offers growth at the intersection of FPGA design, board-level hardware, and system architecture, with on-site work three days a week.

Qualifications

• 2+ years of hands-on FPGA design and development.
• Proficiency in Verilog/SystemVerilog for design and debugging.
• Exposure to AMD (Xilinx) and/or Intel FPGA toolchains, including synthesis, implementation, and timing closure.
• Understanding of digital design fundamentals and the ability to interpret schematics.
• Some exposure to high-speed interfaces such as PCIe, DDR, SerDes, or similar technologies and familiarity with protocols such as AXI4, USB, I2C, and SPI.
• Basic experience bringing up or debugging FPGA designs on hardware platforms.
• Basic TCL and Python scripting skills and experience with version control systems.
• Strong communication and collaboration skills, with an interest in developing system-level thinking.

Responsibilities

• Support FPGA design implementation and bring-up under the guidance of senior engineers.
• Develop FPGA logic for defined interfaces and subsystems as part of a larger design.
• Collaborate with hardware, software, systems, and design verification teams on system-level solutions, simulations, and test coverage goals.
• Support timing closure, resource optimization, lab bring-up, debugging, and basic root cause analysis using JTAG and lab instrumentation.
• Build and maintain TCL and Python scripts that support design and validation workflows.
• Partner in code reviews, design discussions, and PCB and system design decisions that affect FPGA performance, building toward greater technical ownership over time.

Skills

FPGA design

Verilog/SystemVerilog

FPGA toolchains (Xilinx/Intel)

Digital design fundamentals

High-speed interfaces (PCIe/DDR/SerDes

AXI4/USB/I2C/SPI protocols

TCL scripting

Python scripting

Version control

Communication & collaboration

Tools

JTAG

Job description

Teradyne’s Compute Test Division in North Reading, MA, seeks a Junior FPGA Engineer to design and deliver high-performance FPGA-based solutions at the heart of our test platforms. You will collaborate across hardware, software, and systems teams on fast-paced projects and interface with high-speed buses and diagnostics.

The role offers growth at the intersection of FPGA design, board-level hardware, and system architecture, with on-site work three days a week.