Staff CPU Physical Design CAD Engineer — PPA Leader

QUALCOMM, Inc.

Santa Clara (CA)

On-site

USD 209,000 - 314,000

Full time

2 days ago
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Job summary

Qualcomm Technologies, Inc. in the United States seeks a CPU Physical Design CAD engineer to build and support high-performance place-and-route flows, enabling best-in-class power, performance and area for custom CPUs.

You will collaborate with global CPU PD teams and engage with EDA vendors to shape tool roadmaps. You will develop new features, optimize methodologies and maintain flows, ensuring robust PPA and smooth project execution across multiple sites including Santa Clara, San Diego and

Qualifications

  • Masters degree in Electrical/Electronics Engineering or Computer Science.
  • Ten+ years of hands-on experience in place-and-route of high-performance chips - either in a design or CAD role.
  • High level of proficiency in Tcl as well as Python.
  • Experience with automation.
  • Experience with a wide variety of Physical Design tasks - ranging all the way from place-and-route, analysis, timing sign-off and PDV.
  • Experience with advanced technology nodes (5nm or lower).
  • Solid understanding of digital design, timing analysis and physical verification.
  • Strong user of industry-standard place-and-route tools such as Cadence Innovus.
  • Proven track record of managing and regressing place-and-route flows.

Responsibilities

  • Develop, integrate and release new features in our high-performance place-and-route CAD flow.
  • Architect and recommend methodology improvements to ensure our silicon has the best power, performance and area.
  • Maintain, support and debug implementation flows, and resolve project-specific issues.
  • Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA.
  • Work with EDA vendors to define roadmap and to resolve tool issues.

Skills

Tcl
Python
Automation
Digital design
Timing analysis
Physical verification
PPA optimization
Place-and-route
Team collaboration
CAD flows

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field

Tools

Cadence Innovus

Job description

Qualcomm Technologies, Inc. in the United States seeks a CPU Physical Design CAD engineer to build and support high-performance place-and-route flows, enabling best-in-class power, performance and area for custom CPUs.

You will collaborate with global CPU PD teams and engage with EDA vendors to shape tool roadmaps. You will develop new features, optimize methodologies and maintain flows, ensuring robust PPA and smooth project execution across multiple sites including Santa Clara, San Diego and

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