CPU Physical Design Hardware Engineer

Qualcomm; San Diego (CA); On-site; USD 140,000 - 210,000; Full time

Job summary

Qualcomm in San Diego is seeking a CPU Physical Design Engineer to drive RTL-to-GDSII flows for high‑performance, low‑power cores used in 5G SoCs and smartphones.

You will own floorplanning, place-and-route, CTS, STA, power optimization, and physical verification, collaborating with architecture, RTL, and verification teams to meet aggressive schedules and silicon goals.

Qualifications

• Experience delivering RTL-to-GDSII flows for CPU blocks.
• Hands-on with floorplanning, P&R, CTS, STA and power optimization.
• Collaborates with architecture, RTL and verification teams.
• Experience on advanced process technologies is a plus.

Responsibilities

• Own RTL-to-GDSII implementation for CPU cores.
• Lead floorplanning, placement, routing, and timing closure.
• Perform power, area, and timing optimization.
• Coordinate with architecture, RTL, and verification teams.

Skills

RTL-GDSII flow

Floorplanning

Place & Route

CTS

STA

Power optimization

Physical verification

Cross-team collaboration

Tools

EDA tools

Job description

Qualcomm seeks a CPU Physical Design Engineer to develop high‑performance, low‑power CPU cores for advanced wireless and 5G SoCs. You will own RTL‑to‑GDSII implementation, including floorplanning, place and route, clock tree synthesis, static timing analysis, power optimization, and physical verification. Collaborate with architecture, RTL, and verification teams to close timing, area, and power on aggressive schedules. Use industry‑standard EDA tools and cutting‑edge process technologies to deliver silicon that powers smartphones, IoT, automotive, and AI platforms in a fast‑paced, innovative environment.