Sr. Staff CPU Physical Design CAD Engineer

Qualcomm; Santa Clara (CA); Hybrid; USD 198,700 - 298,100; Full time

Job summary

Qualcomm Technologies, Inc. is hiring a CPU Physical Design CAD engineer to develop and support high-performance design flows in Santa Clara. This role includes collaborating with global CPU design teams to enhance methodology and ensure optimal power, performance, and area of custom CPUs.

Ideal candidates will have a strong background in Electrical Engineering and significant experience with place-and-route tools and advanced chip design. A competitive salary range of $198,700.00 - $298,100.00 is offered, along with an inclusive work environment.

Qualifications

• Bachelor's degree in relevant field and 6+ years of experience in engineering.
• Master's degree and 5+ years of experience, or PhD with 4+ years.
• Experience with advanced technology nodes (5nm or lower).

Responsibilities

• Develop and release features in place-and-route CAD flow.
• Architect methodology improvements for silicon performance.
• Debug and maintain implementation flows.

Skills

Tcl proficiency

Python proficiency

High-performance chip design

Automation experience

Digital design understanding

Education

Bachelor's in Electrical Engineering or related field

Master's in Electrical Engineering or related field

PhD in Electrical Engineering or related field

Tools

Cadence Innovus

Job description

Company: Qualcomm Technologies, Inc.

Location: San Diego, Santa Clara, Austin

NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability.

As a CPU Physical Design CAD engineer, you will build and support the world’s best implementation tools and flows. Your tools and flows will ensure our custom CPUs have industry-leading power, performance and area.

Roles and Responsibilities

• Develop, integrate and release new features in our high-performance place‑and‑route CAD flow
• Architect and recommend methodology improvements to ensure our silicon has the best power, performance and area
• Maintain, support and debug implementation flows, and resolve project‑specific issues
• Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class‑leading PPA
• Work with EDA vendors to define roadmap and to resolve tool issues

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience
• Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of related work experience
• PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of related work experience

Preferred Qualifications

• Masters degree in Electrical/Electronics Engineering or Computer Science
• Ten+ years of hands‑on experience in place‑and‑route of high‑performance chips – either in a design or CAD role
• High level of proficiency in Tcl as well as Python
• Experience with automation
• Experience with a wide variety of Physical Design tasks – ranging all the way from place‑and‑route, analysis, timing sign‑off and PDV
• Experience with advanced technology nodes (5nm or lower)
• Solid understanding of digital design, timing analysis and physical verification
• Strong user of industry‑standard place‑and‑route tools such as Cadence Innovus
• Proven track record of managing and regressing place‑and‑route flows

Principal Duties and Responsibilities

• Leverages advanced knowledge of computer architecture, micro‑architecture, logic design, circuits, and/or physical design to develop and verify critical high performance and low power CPU designs.
• Anticipates, identifies, and solves highly complex problems to ensure design completeness, functionality, power, and performance.
• Collaborates with cross‑functional teams to define requirements, specifications, and trade‑offs (e.g., performance, power, cost, functionalities, etc.) in order to accomplish product goals.
• Evaluates all aspects of the design process from conceptualization to productization (i.e., architecture definition, feasibility, pre‑silicon design and verification, and post‑silicon validation) that meet customer and industry standards.
• Writes detailed technical documentation (e.g., feature descriptions, architectural descriptions, verification test plans, and implementation details, etc.) for highly complex CPU designs; reviews documentation of junior engineers.

Level of Responsibility

Works independently with minimal supervision.

Provides supervision/guidance to other team members.

Decision‑making is significant in nature and affects work beyond immediate work group.

Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc.

Has a moderate amount of influence over key organizational decisions.

Tasks do not have defined steps; planning, problem‑solving, and prioritization must occur to complete the tasks effectively.

Pay range and Other Compensation & Benefits

$198,700.00 - $298,100.00

Equal Opportunity Employer

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.