STA CAD Engineer — AI-Driven Timing & PPA

Qualcomm; Santa Clara, San Diego, Austin (CA, CA, TX); On-site; USD 199,000 - 298,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking an experienced engineer to advance STA methodology across cutting-edge CPU nodes. You will architect improvements and collaborate with global CPU physical design teams to optimize power, performance, and area.

You will maintain STA/ECO flows, resolve timing issues, and work with EDA vendors to shape tool roadmaps. Strong Python/Tcl automation and AI-in-EDA skills are highly desired.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 6+ years experience, or equivalent master/PhD.
• Strong STA experience on cutting-edge technology nodes.
• Programming/scripting skills in Python and Tcl; automation mindset.
• Synthesis/PnR experience with focus on PPA optimization.

Responsibilities

• Architect and recommend methodology improvements to ensure our silicon has the best power, performance and area
• Maintain, support and debug STA and timing closure (ECO) flows, and resolve project-specific issues
• Work closely with worldwide CPU physical design teams, and provide methodology guidance and tools/flows support.
• Work with EDA vendors to define roadmap and to resolve tool issues.

Skills

STA experience

Automation mindset

Python scripting

Tcl scripting

AI in EDA

Education

Bachelor's degree in EE/CE/CS

Master's degree in EE/CE/CS

PhD in EE/CE/CS

Tools

EDA tools

Python

Tcl

Job description

Qualcomm Technologies, Inc. is seeking an experienced engineer to advance STA methodology across cutting-edge CPU nodes. You will architect improvements and collaborate with global CPU physical design teams to optimize power, performance, and area.

You will maintain STA/ECO flows, resolve timing issues, and work with EDA vendors to shape tool roadmaps. Strong Python/Tcl automation and AI-in-EDA skills are highly desired.