Senior CPU STA CAD Engineer – Power, Perf & PPA Optimizer

Socket.dev; Santa Clara (CA); On-site; USD 199,000 - 298,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a CPU STA CAD engineer to build and support world-class analysis tools and flows for its cutting-edge CPU designs in California.

You will work with global CPU physical design teams to ensure the silicon meets best-in-class power, performance and area targets. The role requires strong STA background, scripting automation, and collaboration with EDA partners to drive tool roadmaps and ECO closures.

Qualifications

• Bachelor's degree and 6+ years of hardware/software engineering experience.
• Master's degree and 5+ years of relevant experience.
• PhD and 4+ years of relevant experience.

Responsibilities

• Architect and recommend methodology improvements for best power, performance, and area.
• Maintain, support and debug STA and timing closure flows; resolve issues.
• Collaborate with worldwide CPU physical design teams; provide tools/flows support.
• Work with EDA vendors to define roadmaps and resolve tool issues.

Skills

Static Timing Analysis

Python scripting

Tcl scripting

Automation mindset

CI/CD

Timing ECO closure

STA concepts LVF/CCS/SSI/NBTI

Debugging

Synthesis/PnR for PPA

AI in EDA workflows

Education

Bachelor's degree in EE/CE/CS

Master's degree in EE/CE/CS

PhD in EE/CE/CS

Job description

Qualcomm Technologies, Inc. is seeking a CPU STA CAD engineer to build and support world-class analysis tools and flows for its cutting-edge CPU designs in California.

You will work with global CPU physical design teams to ensure the silicon meets best-in-class power, performance and area targets. The role requires strong STA background, scripting automation, and collaboration with EDA partners to drive tool roadmaps and ECO closures.